[SI-LIST] Re: Ground plane split widths...

  • From: "Jack W.C. Lin" <JackWCLin@xxxxxxxxxxxx>
  • To: "'RJ182000@xxxxxxxxxxxxxxxxxxxxxxxxx'" <RJ182000@xxxxxxxxxxxxxxxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx
  • Date: Fri, 30 Aug 2002 17:48:21 +0800

Hi:
IO isolated from high speed region through ground moat is not a total
solution. I mean layout control for IO signal and high speed signal is the
key. Take care of high speed signal and make it's return loop as small as
possible, such that IO signal/GND will capture less coupling from high speed
signal. If you want implement GND moat on IO region, I think that 20 mils
width is enough. Keep remember, GND moat isolation is not a catholicon!
Jack W.C. Lin

-----Original Message-----
From: Johnston, Ross [mailto:RJ182000@xxxxxxxxxxxxxxxxxxxxxxxxx]
Sent: Tuesday, August 06, 2002 10:58 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Ground plane split widths...



Hi

My design is basically a pc motherboard. I have isolated the I/O ground from
the logic ground. Currently the ground plane split is 15 thou - I am
contemplating increasing this width. Should the split be kept as small as
possible? If so - why? If the ground split was too small, wouldn't noise be
coupled across from each plane? What is the general consensus on this?

CHEERS


Ross Johnston
Electronics Design Engineer,
Core Electronics Group,
Lifecycle GST,
NCR FSG (Scotland) Ltd,
Discovery Centre 2nd Floor West,
3 Fulton Road
Dundee,
Scotland DD2 4SW
Tel: +44 (0)1382 592920 Direct Dial
Fax: +44 (0)1382 591089
email: ross.johnston@xxxxxxxxxxxxxxxx


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