[SI-LIST] Re: Ground bounce (was VOH datasheet question)
- From: "Edi Fraiman" <Edi.Fraiman@xxxxxxxxxxxxx>
- To: "Bill Wurst" <billw@xxxxxxxxxxx>
- Date: Tue, 14 Mar 2006 16:20:44 +0200
Hi,
As I know SSO noise is a function of three conditions:
1. Number of switching outputs.
2. Transition time (di/dt) of these outputs.
3. Chip power/ground path inductance.
Edi
> -----Original Message-----
> From: Bill Wurst [mailto:billw@xxxxxxxxxxx]
> Sent: Tuesday, March 14, 2006 3:57 PM
> To: Edi Fraiman
> Cc: si-list@xxxxxxxxxxxxx
> Subject: Re: [SI-LIST] Re: Ground bounce (was VOH datasheet question)
>=20
> Edi,
>=20
> This is a common misconception. If you perform a cursory analysis,
you
> will find that loading an output with more capacitance, while it
> increases the transition time (decreases the slew rate), does not
change
> the amplitude of the rail bounce but it does have the undesirable
effect
> of extending its duration.
>=20
> -Bill
>=20
>=20
> /************************************
> / billw@xxxxxxxxxxx /
> / /
> / Advanced Electronic Concepts, LLC /
> / www.aec-lab.com /
> ************************************
>=20
> Edi Fraiman wrote:
> > Hi,
> >
> > I concur with you.
> > Increased capacitive load reduce the slew rate on the driver
outputs.
> > The slower the output slew rate, the lower the ground bounce will
be.
> >
> > Edi
> > =3D20
> >
> >
> >
> >>-----Original Message-----
> >>From: si-list-bounce@xxxxxxxxxxxxx
> >
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]
> >
> >>On Behalf Of Hal Murray
> >>Sent: Tuesday, March 14, 2006 12:26 PM
> >>To: si-list@xxxxxxxxxxxxx
> >>Cc: hmurray@xxxxxxxxxxxxxxx
> >>Subject: [SI-LIST] Ground bounce (was VOH datasheet question)
> >>=3D20
> >>=3D20
> >>
> >>>You could clarify this issue from Dr. Johnson article named "Big
> >>>Buffer" (http://www.sigcon.com/Pubs/news/8_07.htm).
> >>
> >>=3D20
> >>As usual, his stuff is very good reading.
> >>=3D20
> >>This paragraph caught my attention.
> >>=3D20
> >>
> >>>The main factors that affect SSO noise are (1) the aggregate amount
> >
> > of
> >
> >>>current switched by your IC, (2) the rise time of that current, and
> >>>(3) the number and quality of the power and ground connections
> >>>provided in the IC package. Most relevant to this discussion is the
> >>>total amount of current--more capacitive loading enlarges that
> >>>current, increasing the amplitude of SSO noise.
> >>
> >>=3D20
> >>Why does more capacitive loading make SSO worse?
> >>=3D20
> >>The previous discussion showed that you can compute the output
> >
> > resistance
> >
> >>of
> >>the driver from the short circuit current. That doesn't depend upon
> >
> > the
> >
> >>capacitive loading.
> >>=3D20
> >>I think that capacitive loading will make the duration of the output
> >>current
> >>pulse longer. It will slow down the rise time of the signal, but
> >
> > that's
> >
> >>the
> >>voltage rise time. The current rise time is what causes ground
bounce
> >
> > and
> >
> >>that won't change if you add more load capacitance.
> >>=3D20
> >>What am I missing?
> >>=3D20
> >>Is the turn-on time for a driver slow rather than instantaneous?
> >
> > "Slow"
> >
> >>meaning roughly the same as the (normal) rise time so the normal
> >>capacitance
> >>gets charged while the driver is turning on and the driver never
> >
> > delivers
> >
> >>the
> >>full short circuit current?
> >>=3D20
> >>=3D20
> >>=3D20
> >>--
> >>The suespammers.org mail server is located in California. So are
all
> >
> > my
> >
> >>other mailboxes. Please do not send unsolicited bulk e-mail or
> >>unsolicited
> >>commercial e-mail to my suespammers.org address or any of my other
> >>addresses.
> >>These are my opinions, not necessarily my employer's. I hate spam.
> >>=3D20
> >>=3D20
> >>=3D20
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