[SI-LIST] Re: Ground bounce issue in FPGA?
- From: "Mikhail Matusov" <matusov@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 17 Jan 2002 11:37:34 -0500
Chris,
Even though you say that you have timing margins, all this sounds to me more
like a timing constraints issue in your FPGA design rather than ground
bounce... Simply setting Fmax may not be a good enough way to constrain your
design. The fact that recompiling and temperature both seem to change the
circuit behaviour seems to point in this direction... Also, check for
possible glitches due to possible non-synchronous design in the FPGA.
Regards,
============================
Mikhail Matusov
Hardware Design Engineer
Square Peg Communications
Tel.: 1 (613) 271-0044 ext.231
Fax: 1 (613) 271-3007
http://www.squarepeg.ca
----- Original Message -----
From: Chris Bobek <cbobek@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, January 16, 2002 7:28 PM
Subject: [SI-LIST] Ground bounce issue in FPGA?
>
> Hi,
>
> I have an Altera APEX 20K160E in a 484pin BGA package on a board. I
> have 4 POS-PHY busses (two in, two out) and a 100bit ZBT SRAM bus on the
> FPGA. When I run random, full-rate traffic through the board with a
> fan, I can run error free for several days. If I take away the fan, the
> case temperature ends up at 60degrees C (well within 85degree spec), yet
> I receive several errors per second. I tried recompiling the code to
> try to get the Fmax up, which it did, however I got errors with and
> without the fan. After recompiling several other times, I get different
> error rates with and without the fan. Finally, I compilied an image
> without SRAM (leaving 4 PL3 busses) and ran overnight without errors and
> without a fan.
>
> Here are some facts:
>
> 1) The internal resources are only 30% utilized.
> 2) All external timing on the FPGA, SRAM, PL3 chips, etc. have high
> measured margins, with and without fan.
> 3) I've tried images with/without the internal PLL enabled. Similar
> results.
> 4) If I apply traffic with mostly all 1's (except for CRC), I run error
> free without fan.
> 5) I have 1 .1uF cap per pin, directly under each power pin (I used
> via-in-pad to fit them underneath). Plus, several bulk caps surrounding
> the BGA.
> 6) I did not add any programmable grounds (wish I did).
> 7) I looked at a static, active-high output on the FPGA and noticed
> about a 1V negative spike (dips to ~2.3V) coincident with the clock
> period. Similar is true for active-low output (rises to ~1V). These
> spikes never showed up on other signals that I was doing timing on.
> 8) I've tried different output drivers (LVTTL, LVCMOS). LVCMOS had
> lower errors, but higher ground bounce! Why would that be?
> 9) I've tried slow slew rate and I get the same mixed results...
>
> Of course, I suspect ground bounce is an issue. Are there any other
> measurements I can make? Are there any possible solutions or ideas
> short of choosing a larger part and making every other pin a ground?
>
> Sorry for the long message, this has been one hairy problem!
>
> Thanks,
>
> Chris
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
> or at our remote archives:
> http://groups.yahoo.com/group/si-list/messages
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
>
>
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
