[SI-LIST] Generating several differential clocks

I need to generate 4 SSTL2 clocks for a DDR application. I was thinking
about using an SSTL2 clock generator such as the Pericom PI6CV855, Texas
Instruments CDCV855, Cypress CY2SSTV855, or ICS ICS93V847. The only probl=
em
is that these take differential clock inputs. I would like to drive the
input with a standard LVTTL output clock module.

I was thinking of using an RC combination (say 1K to 0.1uf) to generate
the DC level of the clock and feed that to the negative clock input while=

driving the positive clock input directly. Is this reasonable, or do you
have nay other suggestions? For cost and availability reasons, I would li=
ke
to use the single ended oscillator if at all possible.

Regards,

Chris Johnson



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