[SI-LIST] Re: GTL buffers Vref
- From: Bob Patel <whizplayer@xxxxxxxxx>
- To: naveen@xxxxxxxxx,"'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 19 Sep 2002 13:35:02 -0700 (PDT)
Hi! Naveen, I agree with the conclusion because the
amount of current sourced or sinked depends upon the
loaded interconnect.
Bob
--- "Gupta, Naveen" <naveen@xxxxxxxxx> wrote:
>
> Hi! all,
> Thanks for all of you that helped me in
> understanding
> the issues.
>
> We have come to this conclusion as regards
> lowering of
> Vref for noise-immunity optimality;
>
> The vendor specified Vol number is with reference
> to
> the max sink capability for the GTL driver. If the
> particular
> configuration is less loaded[like in ours], then
> the current
> sinkage is also lower[more termination
> resistance], thereby
> lowering the Vol correspondingly. The Voh on the
> other hand
> is relatively consistent at ~ Vtt for all
> configurations.
>
> Therefore,
> 1). for equal upper and lower noise margins the
> Vref should
> be set correspondingly lower.
> 2). A higher swing [for less current sinking
> configurations]
> impairs the setup timing window at the
> receiver circuits.
> That influences the best Vref determination
> also.
>
> Pls. post your comments especially if the
> conclusion is
> immature/incorrect.
>
> Thanks,
> Naveen
>
> -----Original Message-----
> From: Gupta, Naveen
> Sent: Friday, August 30, 2002 10:46 AM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] GTL buffers Vref
>
>
>
> Hi all,
> I have a basic question about the Vref for GTL
> input buffers.
> If the Vref spec states a 1.0 Volts, but better
> results are obtained
> at a lower voltage, what should be the issues one
> should examine.
> Relatedly, if better results in turn are obtained
> at a higher voltage,
> then what
> should one examine?
>
> Thanks for your answers.
>
> Thanks,
> Naveen
>
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- References:
- [SI-LIST] Re: GTL buffers Vref
- From: Gupta, Naveen
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- [SI-LIST] Re: GTL buffers Vref
- From: Gupta, Naveen