[SI-LIST] Fwd: Re: Re: Drivers on a 50Ohm line
- From: Dav0 Lieby <dav0x@xxxxxxxxx>
- To: SI-LIST <si-list@xxxxxxxxxxxxx>
- Date: Thu, 29 Jul 2004 10:07:41 -0700 (PDT)
--- Wyland <dcwyland@xxxxxxxxxxxxx> wrote:
> Date: Thu, 29 Jul 2004 09:18:53 -0700
> From: Wyland <dcwyland@xxxxxxxxxxxxx>
> To: dav0x@xxxxxxxxx
> Subject: Re: [SI-LIST] Re: Drivers on a 50Ohm line
>
---------------------------------
The output current specification on the data sheet
is usually indirect
value, specifying a maximum output voltage (low state)
for a given
current. For example, it was common for 15 ns SRAMs to
have a
maximum output voltage of 0.4 volts at 8 mA DC. If
this defined
the actual output resistance, the SRAM would be
useless for
driving anything at a cycle time of, say, 20 ns.
The actual output current for these SRAMs was
typically in the
50-150 mA range at these voltages. You had to have
this current
capability for the device to be useful in circuits
that needed 15 ns
access time. The indicator was the AC test circuit,
which typically
had a 30 pF load and a resistor network to pull up to
a logic high.
Working back from the test circuit, you easily figured
out that
the transient current had to be high for the specs to
be met.
Another indicator was the ns/100 pF capacitive loading
curve,
if the vendor supplied it. It directly implies the
transient current.
The reason for this strange state of affairs is
testing. DC testing
at a low current is fine for low speed functionality.
You test this
first, perhaps at the wafer level. The low DC value is
used
because it was previously used for older parts with
access
times of up to 450 ns. If the device survives wafer
test,
it is packaged and AC tested. The AC test covers the
transient
current case and allows a single test for both
internal access time
and external pin drive.
Dave Wyland
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