[SI-LIST] Fw: PCI IO buffer problem?

From: yinhongcheng <yinhc@xxxxxxxxxx>
To: "Sinha, Snehamay" <snehamay@xxxxxx>, tamast@xxxxxxxxx, weirsi@xxxxxxxxxx
Date: Wed, 10 Sep 2008 16:10:11 +0800
Dear All,
   I am sorry! there must have been some wrong when I sent this mail, So I send 
it again.


HongchengYin


----- Original Message ----- 
From: yinhongcheng 
To: Sinha, Snehamay ; tamast@xxxxxxxxx ; weirsi@xxxxxxxxxx 
Cc: si-list@xxxxxxxxxxxxx 
Sent: Tuesday, September 09, 2008 8:25 PM
Subject: Re: [SI-LIST] PCI IO buffer problem?


Hi,Snehamay,todd t and Steve,

     Thank you all very much for your good information which helps me much.

     I have read PCI Spce, I found there were some difference in electric spce
between PCI IO and generic IO.

     At the same time, I checked some vendor's or foundry's such as 
IBM/TI/TSMC/SMIC,
I found they all had special PCI IO buffer cell, and I have done some 
simulation to 
compare generic IO and PCI IO with TSMC 90g library, I found PCI IO had much 
bigger
driver current than generic IO buffer.

     As Snehamay mentioned, if there is a additional ESD clamp ckt for CDM 
protection, 
then it's better not use generic IO buffer to replace special PCI IO in PCI 
interface
design.
     

Best Regard
HongchengYin





  ----- Original Message ----- 
  From: Sinha, Snehamay 
  To: yinhongcheng ; si-list@xxxxxxxxxxxxx 
  Sent: Thursday, September 04, 2008 9:52 PM
  Subject: RE: [SI-LIST] PCI IO buffer problem?



  For a IO to be able to withstand, hot plugging, the receiver will need an 
additional ESD clamp ckt for CDM protection which may or may not be present in 
a standard CMOS receiver.

  Snehamay

  -----Original Message-----
  From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of yinhongcheng
  Sent: Thursday, September 04, 2008 3:37 AM
  To: si-list@xxxxxxxxxxxxx
  Subject: [SI-LIST] PCI IO buffer problem?

  Hi, All,
       Some vendor or foundry provides special PCI(33Mhz or 66Mhz) IO buffer in 
their IO buffer library during ASIC design,but some not.

       So I want to know what is the difference between common CMOS logic IO 
and special PCI IO, if we can use commom IO buffer replace special PCI buffer 
during ASIC design?if do so, what factor (such as Hot-plugging and so on) 
should be take into account? thanks!




  Best Regards
  HongchengYin



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[SI-LIST] Fw: PCI IO buffer problem?

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