[SI-LIST] Re: Fw: HELP LVDS LINE

David, there are multiple requirements:

* You will want to match the two signals in each pair  at a minimum to 
guarantee skew does not ever exceed Tr or Tf min. 
* The match between any data pair and the clock pair must be close 
enough to guarantee Tsu, and Th

Steve.
david stern wrote:
>
>
>
>
>
>
> Hello
> Ihave two questions that I need help:
>  
> 1)  I have 5 differential lines one of them is clock running at 60MHz.
> I am at the layout stage. the five pairs should be at the same length.
> But actually they don't have the same length. What is the maximum difference 
> in
> length that I can accept and how do I calculate it?
>  
> 2) Those signals are deserialized into 28 lines. Are those lines should be 
> ROUTED with the same length? What is the maximum difference in
> length that I can accept and how do I calculate it?
>  
> Thank you
>  
> David
>
>
>
>       
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