[SI-LIST] Free Agilent seminar "Tackling High-Speed Serial Designs" US and Canada Sept 16th to Oct 17th

Hi,
 

A free SI Agilent seminar "Tackling High-Speed Serial Designs" goes on tour 
next month.

 

Registration web page is:

 

http://www.agilent.com/find/highspeedseminar

 

I copied and pasted some details below.

 

Best regards,

 

-- Colin

... solution ... we go viral ... we get on the 'net ... and we blog it out ... 
http://signal-integrity-tips.com

 

 

Agenda:

 

8:00 am - 8:30 am         Registration & Continental Breakfast

8:30 am - 9:00 am         Kickoff "Tackling High-Speed Serial Designs"

9:00 am - 10:00 am       How to Solve DDR Parametric and Protocol Measurement 
Challenges

10:00 am - 10:15 am     Break/Demo Fair

10:15 am - 11:15 am     Successfully Negotiating The PCI Express 2.0 Super 
Highway Towards Full Compliance

11:15 am - 12:15 pm     Characterizing Your PLL-based Designs To Manage System 
Jitter

12:15 pm - 1:15 pm       Complimentary Lunch/Demo Fair

1:15 pm - 2:15 pm         Modeling Multi-Gigabit FPGA Channels Using ADS

2:15 pm - 3:15 pm         TDR, S-Parameters & Differential Measurements

3:15 pm - 4:15 pm         A Design of Experiments for Gigabit Serial Backplane 
Channels

4:15 pm - 4:45 pm         Demo Fair

 

Locations/Dates:

 

Tue. Sept. 16 - Santa Clara, CA

Agilent Santa Clara Office

5301 Stevens Creek Blvd.

Santa Clara, CA  95051

 

Tue. Sept. 23 - Austin, TX

Renaissance Austin Hotel

9721 Arboretum Blvd

Austin, TX  78759

 

Thu. Sept. 25 - Richardson, TX

Radisson Hotel

1981 N. Central Expy.

Richardson, TX  75080

 

Tue. Sept. 30 - Melbourne, FL

Hilton Melbourne Rialto Place

200 Rialto Place

Melbourne, FL 32901

 

Wed. Oct. 15 - Toronto, ON

Le Parc Conference Centre

8432 Leslie Street

Thornhill, ON L3T 7M6

 

Fri. Oct. 17 - Ottawa, ON

The Marshes at Brookstreet

525 Legget Drive

Ottawa ON K2K 2W2

 

 


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