Hello All, This is my first time posting to the list so hopefully the question isn't too generic. I'm currently working on a research project to use FPGAs as flight computers in space at the University of Colorado. I was wondering if people had any general advice for designing circuits in space with it comes to signal integrity and high radiation environments. Things like single event upsets have already been addressed, but I was looking for some insight issues beyond SEUs, SETs and SEEs. Any specific ways of routing circuits or designing them to inherently protect them the harsh space environment? Thanks! -- Sincerely, Sammit Adhya ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: http://www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: http://www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu