[SI-LIST] Re: Embedded Microstrip

Here's my 2 cents, based on limited experience with buried microstrip (3
designs, all very similar). And these designs were done 6 years ago -
maybe things have changed.  You might also be using different stackup
options.

1) embedded microstrip had worse impedance variation than stripline,
about the same as microstrip. This is probably because this was a
microvia design (with blind vias in the core), so the embedded
microstrip was a plated layer.
2) microvias are much nicer than thru-hole vias (obviously)
3) With embedded microstrip (on L2, for instance), you must specify that
there can be no copper over embedded microstrip traces.  "Thieving",
lettering, and pads placed over embedded microstrip traces can have a
very large impact on impedance and flight-times. You'll have to
specifically call out "NO THIEVING or COPPER LETTERING" areas (where
your L2 traces are routed).  And make sure you don't put component pads
in those same areas.

Good luck!


Disclaimer:
The content of this message is my personal opinion only and although I
am an employee of Intel, the statements I make here in no way represent
Intel's position on the issue, nor am I authorized to speak on behalf of
Intel on this matter.=20

Jeff Loyer


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Babid A
Sent: Tuesday, December 20, 2005 11:00 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Embedded Microstrip

Hi,
  =20
  Does anybody have experience with embedded micropstrips?
  =20
  I am planning to use embedded micropstrips instead of microstrips on
external layers to achieve better controlled impedance.=20
  =20
  what are the pros and cons of using embedded microstrips?=20
  =20
  -Thanks a lot
  =20
__________________________________________________
Do You Yahoo!?
Tired of spam?  Yahoo! Mail has the best spam protection around
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