[SI-LIST] Re: Effect of Split Planes on Single Stripline Signals

Wanted to update the reflector that the issue with the missing figures is 
related to opening the pdf within a web browser using certain versions of 
Adobe. Later versions of Adobe seem to be able to open the pdf just fine within 
a browser (for example,v8.1.7).  Alternatively, save the pdf to your desktop 
and open it outside of a web browser. In that case, the document opened fine 
with all of the Adobe versions I tested, including v6 and v7.

Thanks Charles for pointing this out.

Jason
 

On Jun 14, 2010, at 10:26 AM, Grasso, Charles wrote:

> Hello Jason - I read your paper with interest! Thanks for posting the link.
> However I noticed that several graphs are missing from the posted paper.
> Would you please look into this and maybe link to a fixed paper?
> 
> Thanks!!
> 
> Best Regards
> Charles Grasso
> Desk 303-706-5467
> Cell: 303-204-2974
> Chamber: 303-706-5144
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
> Behalf Of Istvan Novak
> Sent: Saturday, June 12, 2010 9:37 AM
> To: Walter
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Effect of Split Planes on Single Stripline Signals
> 
> Walter,
> 
> There are a few more details to take into consideration:
> - what is the stackup beyond the split plane?  If you have a solid 
> ground plane close behind the split plane, it helps.  On the other hand, 
> if you have further (possibly split) power planes beyond the split-plane 
> layer, it will make things worse.  You will find graphs illustrating the 
> former in Jason's paper referenced below.
> - what do you carry on the (split) planes?  Though this is not 
> specifically a split-plane problem, even when we offset the stripline 
> away from a plane layer, we need to consider the magnitude of noise 
> expected on the plane.  If supply rails related to your signaling, it is 
> safer as opposed to say a high-voltage (12V or 48V) input rail.  In the 
> offset stripline stack a noisy 12V plane should be much further away 
> from the trace layer
> 
> Regards,
> 
> Istvan Novak
> Oracle-America
> 
> 
> jason.miller@xxxxxxxxxx wrote:
>> You may find this paper helpful:
>> 
>> http://www.electrical-integrity.com/Paper_download_files/DC09_10-WA3--Jason_Miller.pdf
>> 
>> 
>> Jason Miller
>> 
>> On Jun 9, 2010, at 5:00 PM, Walter <waltinaustin@xxxxxxxxx> wrote:
>> 
>> 
>>> I have an application were I am contemplating routing signals across  
>>> splits in a plane. Everyone know that this is a big no no for high  
>>> speed signals. But in this case, it's a asymmetric single stripline.  
>>> The traces are 12 mils from a split plane and 3mils from a solid  
>>> plane. Can I expect a measurable effect on my DDR3 1600 signals? I  
>>> would like to simulate this with a 3d solver but I don't have access  
>>> to one.
>>> 
>>> Regards,
>>> Walter Haskell
>>> Polycom. Inc.
>>> 
>>> 
>>> 
> 
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