[SI-LIST] Re: ESD is a low frequency event -really??
- From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
- To: "'steve weir'" <weirsp@xxxxxxxxxx>,Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>,Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>,"'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 17 Mar 2004 14:06:37 -0800
Steve,
I would have to disagree. If I take you model and make the impedance between
23 and 0 smaller (either by making CY2 very big or a parallel shunt Rs with
very small value), the noise across CX actually increases. Clearly that's
not the case in Doug's experiment. Remember, the shunting can only be done
asymmetrically on either 23 or 13 (i.e. he can only shunt one node to
chassis but not both) and yet this asymmetrical shunt causes a dramatic
decrease in differential noise between 23 and 13 (at least in some area of
the PCB). That's why I believe the noise injection is skew towards one side
and bleeding it through the chassis give you a better bang for the buck (no
need to add planes).
-----Original Message-----
From: steve weir [mailto:weirsp@xxxxxxxxxx]
Sent: Tuesday, March 16, 2004 4:25 PM
To: Chris.Cheng@xxxxxxxxxxxx; Chris Cheng; 'si-list@xxxxxxxxxxxxx'
Subject: Re: [SI-LIST] Re: ESD is a low frequency event -really??
Chris, no problem. I think that we are both looking at the chassis as a
big shunt, but have expressed it differently. The line to chassis ground
connections in my case are CY1, CY2. Since ESD is not DC, the fact that
CY1 and CY2 block DC doesn't matter, just make the capacitances
large. They are non-ideal capacitors, so they each have the equivalent of
( Rshunt + R3 + Lshunt + L3 )/2 that you propose. It's pretty much just a
different way of organizing the network into a familiar form. The one
objection that I do have is the noise injection at 23 instead of 1. My
rationale for injecting at 1 is that from a distance the power and ground
planes were very similar but not perfectly matched to the noise
source. Alternately we could make either R1 or R2 an open and inject into
node 1.
Now, let's see what happens in both cases.
First, without a connections to a low inductance chassis, differential
conversion is limited by CX. So, I think that we agree on the value of
frequent, low impedance chassis connections.
Second, unequal impedance between L2 and the shunt path Lshunt/Rshunt/L3/R3
in your model, or CY1, CY2 in my model both lead to differential voltage
across 12 to 22 and 13 to 23, that CX reduces.
Are we in agreement so far?
Regards,
Steve.
At 03:43 PM 3/16/2004 -0800, Chris Cheng wrote:
>Sorry Lshunt should be 23a 23 not 13a 23
>
>-----Original Message-----
>From: Chris Cheng
>Sent: Tuesday, March 16, 2004 3:37 PM
>To: 'steve weir'; Chris Cheng; 'si-list@xxxxxxxxxxxxx'
>Subject: RE: [SI-LIST] Re: ESD is a low frequency event -really??
>
>
>Steve,
>I would propose modifying your circuit a little bit,
>
>vsource 1 0
>
>R1 1 12
>L1 12 13
>CX 13 23
>* remove CY1 13 0
>
>R2 1 22
>L2 22 23
>* remove CY2 23 0
>
>
>*add the following
>R3 1 32
>L3 32 33
>
>Inoise 23 0
>
>Rshunt 33 23a
>Lshunt 23a 23
>
>The R3/L3 represent the chassis and the Inoise is the ESD discharge
injected
>into the logic ground branch.
>The question then becomes whether making the Rshunt/Lshunt very small (dead
>shorts between chassis and logic ground) and R3/L3 very small (gigantic
>chassis metal cage vs. copper PCB planes) makes the differential noise
>between 23 and 13 even smaller by steering the current through branch R3/L3
>instead of R1/L1 and CX.
>
>What do you think ?
>
>-----Original Message-----
>From: steve weir [mailto:weirsp@xxxxxxxxxx]
>Sent: Tuesday, March 16, 2004 2:14 PM
>To: Chris.Cheng@xxxxxxxxxxxx; 'si-list@xxxxxxxxxxxxx'
>Subject: Re: [SI-LIST] Re: ESD is a low frequency event -really??
>
>
>Chris, I agree with most of your points here. The way that I look at this
>problem is as a network of parallel LC shunts between the PCB planes, both
>power and ground and the chassis. So, definitely I agree that more shunts
>will do a better job of limiting differential potential.
>
>The behavior of the BC is to shunt between those networks. You can run a
>very quick SPICE model by taking three non-ideal capacitors in a classic
>line to line and line to ground ( ie X + 2Y ) filter configuration, and
>tolerance the values. In our case the X capacitor is the BC. Place an
>impedance, resistive and/or inductive in series with each line and then
>monitor both the CMV, and the DMV across frequency for a noise source fed
>into both of the impedances:
>
>vsource 1 0
>
>R1 1 12
>L1 12 13
>CX 13 23
>CY1 13 0
>
>R2 1 22
>L2 22 23
>CY2 23 0
>
>The common mode voltage may be observed at either node 13, or 23. The
>differential mode is across 13 and 23. Imagine 13 as a point on a voltage
>plane and 23 as a nearby point on a ground plane.
>
>Now, if we make CX really small, then the matching of the LPF networks
>determines the differential mode conversion. By increasing the value of
>the X capacitor, we can swamp out the differences and greatly improve the
>common mode to differential conversion caused by the network mismatches,
>which is to say our immunity.
>
>But how much improvement do we need over ordinary dielectric and when? I
>would like to figure out for myself if and when high cost BC is justified
>at design-time as opposed to as a big band-aid for a customer who can't
>ship an improperly designed product. I don't personally know the answer,
>and was hoping that Mike would provide some numbers or more specific
>examples.
>
>Regards,
>
>
>Steve.
>
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