[SI-LIST] Re: ESD is a low frequency event -really??
- From: MikonCons@xxxxxxx
- To: si-list@xxxxxxxxxxxxx
- Date: Thu, 11 Mar 2004 17:46:26 EST
In a message dated 3/10/2004 4:01:36 PM Pacific Standard Time,
Chris.Cheng@xxxxxxxxxxxx writes:
No real data/example, still speculation.
You can't just say I've done it 35 years therefore it must be correct if you
can't even tell me there is a single case where a properly stackup PCB
without BC will fail ESD test and after adding BC it works. This is a simple
yes or no answer, nothing proprietary about it.
I am still waiting.
****************
Chris: Two items follow.
1. Perhaps the explanation I offered was not explicit enough for you. The
"50-60 different designs" I referred to had ESD susceptibilities and yes, some
of
them were not well layed out to start with; however, even well designed
boards improved their margins of susceptibility using BC construction.
2. As for your "core power distribution case" and "discharge happens through
your package," I agree that BC (or few if any other techniques) will correct a
design that places PCB-mounted components in (ESD) harms way. None of my
earlier comments implied that BC alone was a panacea for ESD problem
correction. I
do maintain that use of BC is an excellent tool for minimizing the disruptive
effects of any high-frequency injection of common-mode voltage on a power
distribution system (PDS). Since the electrical environment for operational
circuits AND their interconnects which use power or ground as reference planes
(as
any good designer would) is formulated by the PDS, CMV bursts are mitigated to
a substantial degree.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
Cell: (408)821-9843
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