[SI-LIST] Re: ESD Issues

  • From: "Salkow, Steven" <steven.salkow@xxxxxxxx>
  • To: SteveMitchell@xxxxxxxxxx,Signal Integrity Forum <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 03 Oct 2003 09:54:10 -0700

There are 100s of articles on the subject already published.
http://www.maxim-ic.com/appnotes.cfm/appnote_number/639/ln/en
This is but one of them.

The three main considerations are:
What level of protection is afforded that the protecting device can
handle. (Speed, polarity, recovery, energy level capability.)
What is the effect of adding ESD protection to normal performance
(capacitance loading, leakage etc.)
What does it cost in board real estate and how much it cost.

Your circuit determines what is required. (Part's susceptibility, speed
of operation, harsh environment, etc.)


Steve Salkow

-----Original Message-----
From: Steve Mitchell [mailto:SteveMitchell@xxxxxxxxxx]
Sent: Friday, October 03, 2003 2:45 AM
To: Signal Integrity Forum
Cc: Nigel.Hughes@xxxxxxxxxx
Subject: [SI-LIST] ESD Issues


Dear Forum,
                    What are the different issues between usage of
Zeners and Varistors for ESD protection
Regard
Steve
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