[SI-LIST] Re: EMI simulation tools at PCB level
- From: Ron Matthews <rmatthews@xxxxxxxxxx>
- To: kalevi@xxxxxxxxxx, Chris.Cheng@xxxxxxxxxxxx, 'Charles Grasso ' <cgrassosprint1@xxxxxxxxxxxxx>, zhang_kun@xxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 06 Dec 2004 07:59:17 -0500
Let me know how that works out for you! ;')
At 04:27 PM 12/3/2004 -0500, Kai Keskinen wrote:
>If you combined a tool like FlowEMC with a tool like SpecctraQuest or
>Hyperlynx, with a logic simulator that allowed you to exercise the
>board/system in a fully functional manner, so that the simulated ibis
>devices were triggering at the right timing intervals and sending their
>voltages/currents down the simulated tracks with the simulated planes/shapes
>and sucking up and sourcing current through the simulated power delivery
>system, in the simulated housing/shelf/frame with the attached I/O and power
>cables, you could in theory get some reasonably accurate emissions profiles
>for your board/housing/shelf/system if direct emissions from the chip
>packages were ignored. You would also need massive memory and cpu capacity.
>I apologize for the run on sentence.
>
>By properly using SI tools, EMC tools, and your experience, you can design
>to minimize EMI and EMC susceptibility as well as quickly troubleshoot for
>EMI/EMC failures. Every design is a balance between meeting
>functionality/specs and cost. The design tools let you understand and
>evaluate the compromises so that you can meet your design requirements at
>the minimum cost ($, space, weight, power, ...).
>
>Cheers,
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Cheng
>Sent: Friday, December 03, 2004 2:13 AM
>To: 'Charles Grasso '; Chris Cheng; 'zhang_kun@xxxxxxxxxx ';
>'si-list@xxxxxxxxxxxxx '
>Subject: [SI-LIST] Re: EMI simulation tools at PCB level
>
>
>You mean the =22 part ? :-D
>
>Seriously, I know it is understandable and explainable but I want it to be
>automatically predicted and simulated by a tool. It is easy to fix and patch
>after the fact but I have yet to see a tool to tell me ahead of time the db
>and peaks location. A bare PCB with a few "experimental traces" as in some
>EMI papers, sure. A multi-boards system with chassis and spaghetti cables
>come out ? Show me the money.
>
>-----Original Message-----
>From: Charles Grasso
>To: Chris.Cheng@xxxxxxxxxxxx; zhang_kun@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
>Sent: 12/2/2004 10:31 PM
>Subject: RE: [SI-LIST] Re: EMI simulation tools at PCB level
>
>Chris - It would be *much* easier for you to contact some experienced
>EMC
>engineers - the phenomena you describe are understandabe and
>explainable.
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Chris Cheng
>Sent: Thursday, December 02, 2004 5:13 PM
>To: 'zhang_kun@xxxxxxxxxx'; si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: EMI simulation tools at PCB level
>
>
>I am sure the consumer product guys will laugh at my stupidity but I can
>never design a PCB that will pass FCC B without a large metal cage
>chassis.
>I've always wanted to simulate why if I tighten the screw by one more
>turn
>on my door and my EMI gaskets compressed a little harder and the
>signature
>changed by 10 db. Or if I hang the cable this way or that way the
>signature
>changed by a few db. What I am trying to say is while EMI from PCB may
>be
>the source, the enclosure/environment the PCB is in seems to have a
>bigger
>impact on whether you are passing FCC than the PCB itself. Granted this
>is
>just from an incompetent designer like me who cannot ship an absolute
>clean
>PCB that can be wrapped in a plastic bag and passing FCC. Any simulation
>tools that can help me ?
>
>ps Is there any way I can receive messages from the list from outside
>the US
>without these =2 =22 ? I know the US or English language is not the
>center
>of the Universe so I appolgize in advanced.
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Ron Matthews
Draper Labs
555 Technology Square
Cambridge, MA 02139
Voice: 617-258-2519
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