Dear all: The PDN noise voltages at the edges of a PCB are potential electromagnetic interference sources,the noise may be produced by SSN or cavity resonance. Many paper ,such as EBG technology,based on this suppose,but does this noise really matter in a typical digital board which include many high speed memory and serdes ?Does any test analysis that the plane edge noise account for how many percent in the total radiation noise ? Thanks and regards, LIU Luping ***************************************************************** This e-mail and its attachments contain confidential information from HUAWEI, which is intended only for the person or entity whose address is listed above. Any use of the information contained herein in any way (including, but not limited to, total or partial disclosure, reproduction, or dissemination) by persons other than the intended recipient(s) is prohibited. If you receive this e-mail in error, please notify the sender by phone or em ail immediately and delete it! ***************************************************************** ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu