[SI-LIST] Re: Differential Pair Characteristic Impedance Tradeoffs
- From: "Carrier, Patrick" <Patrick_Carrier@xxxxxxxxxx>
- To: <mbowman@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 7 Oct 2005 10:38:03 -0500
Melvin--
It is possible to meet all your requirements if you make the traces
wider than 5 mils. This means your dielectric height would have to get
larger too (to keep your single-ended impedance), but then you have more
flexibility to move the 90-ohm diff. traces closer together than the
100-ohm diff. traces, which lets you have both differential impedances
with the same single-ended impedance. Basically it moves everything
further away and keeps you from having to violate your minimum 5-mil
spacing restriction.
If that is not an option, I would note (as others have) that with most
differential signals, the differential impedance is more important.
--Pat
Patrick Carrier
Technical Marketing Engineer
Hyperlynx/High Speed Design
Mentor Graphics Corporation
Patrick_Carrier@xxxxxxxxxx
ph. (512) 425-3015
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of melvin bowman
Sent: Thursday, October 06, 2005 8:56 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Differential Pair Characteristic Impedance Tradeoffs
I find, in attempting to determine trace and space widths for multiple
differential pairs with different impedance requirements on a single PCB
layer, it can be impossible to find a perfect solution while staying
within acceptable manufacturing constraints.
I.e. Given the following.
Impedance Requirements
Single-ended (default) trace is desired to have a Zo a of 60-ohms.
Diff. Pair #1 characteristic impedance =3D 60-ohms single-ended and
100-ohms differential.
Diff. Pair #2 characteristic impedance =3D 60-ohms single-ended and
90-ohms differential.
All impedances specified with a tolerance of +/-10%.
Manufacturing Constraints
Single-ended (default) trace with =3D 5 mils.
Minimum trace width =3D 5 mils.
Minimum space width =3D 5 mils.
Trace thickness (t) =3D 0.7 mils or 1.4 mils (1/2 oz. or 1 oz. copper)
Dielectric thickness (h) =3D 4 - 5 mils (microstrip).
Effective dielectric constant (Er) =3D attainable values with FR4 (3.4 =
-
4.8 ???) What is the reasonable range?
From the constraints, above, we can see that both diff. pairs #1 and #2
will have a trace width of 5 mils, as they have the same single-ended
characteristic impedance as that of the default single-ended 5 mil
trace.
Given this information we can determine a dielectric thickness (t) and
effective dielectric constant (Er) to meet the requirements for diff.=20
pair #1 while staying within the bounds of our manufacturing
constraints. However, at this point we have the diff. pair #2
requirements to contend with. As diff. pairs # 1 and #2 are both on the
same layer and have the same single-ended characteristic impedance they
must both have the same trace width (5 mils). This leaves us with only
one parameter to adjust to get a 90-ohm differential impedance for diff.
pair #2 while maintaining a 100-ohm differential impedance for diff.=20
pair #1. When we attempt to set a differential pair spacing to attain a
90-ohm differential impedance for diff. pair #2 we find that we can't
get them close enough together to accomplish this without seriously
violating our minimum space width constraint of 5 mils.
Our only solution appears to be to compromise on the characteristic
impedances of our various traces, both single-ended and differential. =20
When we do this we begin to eat away at the +/-10% tolerance that was
intended to be a manufacturing tolerance, not a calculation tolerance.
If we make this compromise we come up with numbers such as the following
scenario.
Single-ended (default) trace =3D 5 mils and 60-ohms.
Diff. Pair #1 =3D 5 mils and 60/101-ohms with a 5 mil spacing..
Diff. Pair #2 =3D 5.7 mils and 56/94-ohms with a 5 mil spacing.
This is accomplished with a trace thickness (t) of 1 mil, a dielectric
thickness (h) of 4.3 mils and an Er of 4.2.
(Note that I used a 1 mil thickness rather than 0.7 or 1.4. This was
just to split the difference for ease of analysis and has a small impact
on the overall result. Likewise, different impedance calculators may
give different numbers but the trend should provide similar results)
Assuming that no one can tell me how to get the calculations to work out
exactly to the requirements without violating the manufacturing
constraints, this leads to my actual question(s).
1) How important is the single-ended impedance of the traces of a
differential pair and what is the impact of a deviation of 5% - 10%?
2) Is the best compromise to target the desired single-ended impedance
for the benefit of the non-differential default traces and adjust the
width and spacing of the differential pairs to give the desired
differential impedances while violating their single-ended impedance
specifications?
3) Is it better to compromise all impedances, default single-ended as
well as diff. pair single-ended and differential impedances and just try
to find a tradeoff that keeps them all relatively close to their desired
values, if possible?
4) If the answer to question #1 hasn't already answered this question,
what is the importance of the single-ended impedance of a differential
pair, as long as it's balanced (both traces have the same single-ended
impedance).
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