[SI-LIST] Re: Decoupling for PLL

  • From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
  • To: "'leeritchey@xxxxxxxxxxxxx'" <leeritchey@xxxxxxxxxxxxx>, Istvan Novak <istvan.novak@xxxxxxxxxxxxxxxx>, zhangkun 29902 <zhang_kun@xxxxxxxxxx>
  • Date: Mon, 30 Aug 2004 14:55:27 -0700

Let's be specific here, did the vendor ask you to put ferrite on the PLLVDD
or the output rail VDD ? I've seen crazy app notes call for ferrite on AVDD
where it turns out to be the "highspeed" output rail, they some how think
the fact that the output is 2.4GHz and therefore need super quiet supply.
That's nuts and should never be called for. But that has nothing to do with
the PLLVDD needing extra filtering which is always a good thing provide you
don't choke your supply to death by your ESR and you take care of your Q
factor. I have yet to see a single PLL design that does not isolate the
PLLVDD from the main supply and expect some form of external filtering help
(at least for some specific band of frequencies).

>In application notes, these networks are being included out of knee jerk
>response to a large collection of rules of thumb.  To demonstrate this, I
>have scope traces of a 2.4 GB/S serial link that was designed with the
>manufacturer's ferrite solution in the power lead.  The waveform is not
>great.  In fact, it fails bot jitter and voltage margin tests.  When the
>ferrite bead is removed, the eye diagram met all jitter and noise margin
>specs.
>
>When the vendor rep was presented with this data, he was surprised and
>correctly observed that it was time to stop putting ferrite beads in the
>power leads.  Further questioning revealed that no measurements had ever
>been made by the vendor to insure the beads were of value.
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