[SI-LIST] Re: Decoupling capacitors
- From: steve weir <weirsi@xxxxxxxxxx>
- To: "Joe Paul M" <joepaul@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 16 May 2005 14:04:44 -0700
Joe, that is correct.
There are three basic ways that people bypass: The big "V", "capacitors by
the decade", and fine multipole. Each has different
trade-offs. "Capacitors by the decade" pretty much suffers the limitations
of both of the other two methods without any of the advantages.
Larry Smith and company came up with the fine multipole approach as a way
of achieving two goals: 1) reducing the total number of capacitors needed
for very low impedance networks, and 2) decreasing the Q of the
network. If you need a really, really low and constant bypass network
impedance it is a method worth considering. But I consider it optimal only
for special cases such as a chip that needs insanely low PDS impedance out
to what I feel are unreasonably high frequencies for practical PCB
implementations. But that is apparently a problem that Larry and his
colleagues have been forced to solve and they came up with that creative
and for the circumstances, effective solution. A typical network would
have ten to a dozen different capacitor values in quantities ranging from
just one each of the largest capacitance values to hundreds of the
smallest. When one doesn't need hundreds of capacitors to hit the high
frequency target, fewer total capacitor values get used, and pass band
ripple goes up, and relative ESR goes down, progressively removing the
advantages it seeks over the big "V".
Steve.
At 09:42 PM 5/16/2005 +0530, Joe Paul M wrote:
>Thanks steve.
>
>So I conclude that , I can use 1 uF 0603 caps for all my decap
>requirements as it comes at same and practically slightly lower cost
>than , 0.1,0.01,0.001 mixture , due to the volume business deals.
>
>
>-----Original Message-----
>From: steve weir [mailto:weirsi@xxxxxxxxxx]
>Sent: Monday, May 16, 2005 9:23 PM
>To: Joe Paul M; si-list@xxxxxxxxxxxxx
>Subject: RE: [SI-LIST] Decoupling capacitors
>
>Joe "capacitors by the decade" can be used properly to theoretically
>slightly reduce the number of capacitors or increase the ESR of the
>network. In many common cases, it is just a rote practice that provides
>no
>actual value. Life with SMT devices is much different today than when
>we
>had leaded devices and those practices were first adopted.
>
>Steve.
>At 08:42 PM 5/16/2005 +0530, Joe Paul M wrote:
> >Thanks Steve,
> >
> >Your explanations were really good and I did understand your
> >explanation.
> >
> >But I have seen people using, 0.01 uF and 0.001 uF, even when 0.1 uF
> >caps for the required voltage rating are available in same package.
> >
> >Is there reasoning behind the above approach?
> >(I have not yet checked the ESL and ESR of these in their datasheets)
> >But I understand that typically ESL remains same for same package &
> >Dielectric, and ESR reduces with increase in Cap values( as per SICap3
> >tool of AVX)
> >
> >Thanks
> >Joe Paul
> >
> >
> >-----Original Message-----
> >From: steve weir [mailto:weirsi@xxxxxxxxxx]
> >Sent: Monday, May 16, 2005 7:10 PM
> >To: Joe Paul M; si-list@xxxxxxxxxxxxx
> >Subject: Re: [SI-LIST] Decoupling capacitors
> >
> >Joe Paul, the ESL may be the same but the ESR of the 1uF in the same
> >chemistry and voltage will definitely be about 35-40% that of the
> >0.1uF. It is very unlikely that 0.1uF will provide any cost or
> >performance
> >advantage over 1uF in the same 0603 case from the same mfg at a low
> >voltage
> >rating. Due to cover layer considerations, depending on the voltage
>and
> >
> >chemistry, the 1uF may actually exhibit lower mounted inductance than
> >the 0.1uF
> >
> >At 2ns/ 160MHz, both capacitors are fully inductive and cover layer
> >issues
> >aside will have very similar performance. The 1.0uF capacitor has the
> >benefit of more capacitance which generally makes it easier to
>stabilize
> >
> >the transition from the bulk capacitors / VRM. Fans of the big "V"
>like
> >
> >Dr. Johnson, Istvan Novak, and myself will usually advise that at the
> >same:
> >cost, package size and chemistry, take the bigger capacitor. If you
> >want
> >to find out why some people do things differently, take a look at Larry
> >Smith and company's papers on multipole capacitor networks. If nothing
> >else, those papers should help you better understand what you are doing
> >whether or not you elect to follow the methods they describe.
> >
> >If you really want to see how your capacitors perform and have access
>to
> >a
> >VNA, I suggest building a test board. You can get details on such a
> >board
> >from Istvan's papers on his web site, or from mine on the X2Y web
> >site. You can put together a decent set of CPW test fixtures for under
> >$200. cash and some time. Your biggest expense will be a pair of SMA
> >connectors per fixture.
> >
> >If you want more information on bypass network design, Istvan's web
> >site,
> >the Teraspeed web site, and the X2Y web site all have papers on the
> >subject.
> >
> >
> >Steve.
> >At 04:58 PM 5/16/2005 +0530, Joe Paul M wrote:
> >
> > >I have a doubt regarding decoupling capacitors.
> > >
> > >I have the option for using 1 uf9AVX 06036D105KAT2A) or 0.1uF
>(AVX
> > >0603ZC104KAT2A) at same cost.
> > >
> > >Concerned rise time is about 2nS.
> > >
> > >Is there any issue in using 1uF caps, if it has same ESR and ESL and
> > >package (0603) as 0.1uF.
> > >
> > >Thanks all
> > >Joe Paul
> > >
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