[SI-LIST] Re: Decoupling a IC
- From: "istvan novak" <istvan.novak@xxxxxxxxxxxxxxxx>
- To: <jtalavera@xxxxxx>, "si list" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 4 Mar 2003 08:15:57 -0500
Juan,
We can approach your question from different angles, and
you can also search the si-list archives for past threads on
the same or very similar topics.
1., Yes, putting nine ceramic caps around a small active device
may sound insane, but you can find comfort in the fact that
many people out there do it. If and when you do it, the cost
of ceramic parts dwarfs compared to the cost of active
devices, so the challenge is board space (less so if you
use the smallest size parts) and/or finding the proper
layout.
2., The expression you cited is based on the transient current
and impedance of power-distribution network (PDN) and the
bandwidth of signals: BW~1/(PI*tr), dU=L*dI/dt, V=Z*I.
These are fundamental expressions of electronics, and though
we can argue about the constant in the bandwidth formula,
we can hardly argue about the general validity of these
three expressions. Especially so when we also factor in your
~700Mhz bandwidth, meaning that everything around your
small active device can be fairly accurately decribed by lumped
equivalent circuits. What people CAN and DO argue a lot is
what is the correct amount of noise at the various points
of PDN that the system can tolerate while still working
properly. It is a very complex question, and there is no
single answer to it. However, once you come to a
maximum tolerable noise for your particular system, the rest
of the calculation is straightforward.
3., Once you have your PDN inductance target, you can provide
it either with capacitors, or with planes, or a combination of
the two. power-ground plane pairs will give give an approximate
high-frequency inductance of about 30pH for each mil of plane
separation. your 160pH inductance can be achieved by using a
plane separation of 5 mils or less. If you use this plane separation,
there is no need whatsoever to use high-frequency ceramic
capacitors to set the high-frequency inductance. You still need
capacitors to set the proper impedance at lower frequencies.
Alternately, if you dont want or cannot use power-ground plane
pairs with 5 mils or less separation, you will need to provide
the inductance by paralelling up capacitors.
Regards,
Istvan Novak
SUN Microsystems
----- Original Message -----
From: "Juan Manuel" <jtalavera@xxxxxx>
To: "si list" <si-list@xxxxxxxxxxxxx>
Sent: Monday, March 03, 2003 1:20 PM
Subject: [SI-LIST] Decoupling a IC
>
> Hi all!!
>
> I'm trying to decouple a component with 9 outputs and 3 power pins and
500ps
> of rise time ( so, I need decouple the component until 700MHz). I'm
> following the typical process of set a Target Impedance, decouple low
> frequencies with a bulk capacitor and decouple High frequencies with
ceramic
> capacitors.
> My problem is that When I calculate the induction budget to determiante
the
> number of ceramic capacitors ( following the Black Magic Book, formula
8.18
> : L(tot)=X(max)Tr/3.1416 ), the value is very small: 160pH for a 500ps of
> rise time and 1 ohm of target impedance. Therefore I should put 7
capacitors
> in parallel. I think that putting seven bypassing capacitor for a small
> component is insane. any solution?
>
> Thanks in advance
>
>
>
>
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