[SI-LIST] Decoupling Using 3-Terminal Capacitor
- From: Himanshu Arora <ha324005@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 31 May 2005 14:45:15 -0700 (PDT)
Hello,
I am making a prototype PCB where in there are
multiple VDDs.
The Power Supply filter network looks somewhat like
the one shown in the figure attached in text file.
Instead of 2 terminal caps I plan to use the
3-terminal cap. The 3-terminal caps are from Murata.
The reason of using 3-terminal caps against 2-terminal
Multi-layer-ceramic caps is that they offer lower ESR
at SRF, their lead inductance is lower and their SRF
is higher for the comparable cermic cap in value and
case size. The reason I am connecting the two
3-terminal caps in series is to offer a lower
impedance across a wide range of frequencies.
I would like to have your views and inputs for the
above arrangement. Thanks.
Sincerely
Himanshu
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-- Attached file included as plaintext by Ecartis --
-- File: 3tcap.txt
-- Desc: 2302733855-3tcap.txt
VDD C1 C2
---- ----
|--------Ferrite------------------------------------VDDA
| ---- ----
| | |
| | |
| GND GND
|
| ---- ----
|--------Ferrite------------------------------------VDDD
| ---- ----
| | |
| | |
GND GND
C2 = 2200pF (NFM21CC222R1H3)
C1 = 1uF (NFM21PC105B1A3)
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- [SI-LIST] Re: Decoupling Using 3-Terminal Capacitor
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