[SI-LIST] DDR2 - termination of UQDS

We are using a PowerPC from Freescale with a 64-bit DDR2 memory controller 
(72-bit with ECC). On our board we used four 16-bit wide DDR2 SDRAM devices. 
We would like to use the same chip on the ECC interface. But how do we 
terminate the upper DQS signals (UDQS# / UDQS) and the unconnected data DQ 
pins, since the ECC interface is 8-bit only? Thanks in advance.

Peter

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