[SI-LIST] Re: DDR-2 memory models

Indira,
        ODT is turned on or off based on reads/writes and based on the
slot topology (ranks/rows found in the system). See link below for a
good explanation of how ODT should work.

http://www.samsung.com/Products/Semiconductor/Memory/appnote/an_ddr2_odt
_control_20041228.pdf=20

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Indira Gazula
Sent: Wednesday, June 28, 2006 7:14 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR-2 memory models

Hello,
 =20
  I have come across a couple of models for DDR-2 components which have
ODT input buffers for DQ but not ODT drivers. My understanding is that
once the ODT is enabled, it works even when the pin is transmitting. So
why this disparity in models?
 =20
  Any insight regarding this issue is appreciated. Thanks in advance.
 =20
  Indira.
 =20
                        =09
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 =20

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