[SI-LIST] Re: DDR2 design issues?
- From: Bill Wurst <billw@xxxxxxxxxxx>
- To: icer world <icermail@xxxxxxxxx>
- Date: Tue, 25 Mar 2008 10:47:05 -0400
Hello Icer,
From the way you have phrased your question, referring to terminations
as "pull-ups," I suspect that your background is digital design and not
SI. The design of something as complex as a DDR2 interface is not
something that could be readily communicated in an email response, even
to someone already skilled in the practice of SI. I would suggest
subcontracting out the design. There are a number of folks on this list
who may be in a position to take on additional work at this time, if
that is a direction you wish to pursue.
Best regards,
-Bill
/************************************
/ billw@xxxxxxxxxxx /
/ /
/ Advanced Electronic Concepts, LLC /
/ www.aec-lab.com /
************************************
========================================================================
icer world wrote:
> hello everyone:
> I will use DDR2 in my design ,and the DDR2 controller surpport ODT
> function .I think if I take use of ODT function ,pull-up resistor connected
> to VTT (0.5VDD) will not be needed in all the signal pins.But I got a demo
> design from chip applier that use 50ohm pull-up resistor connected
> to VTT in all the signal pins.Can anyone tell me whether pull-up resistor
> connected to VTT is needed in my design?If needed,please tell me how to
> design it ,thanks!
>
>
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- Follow-Ups:
- [SI-LIST] ASIC design, DDR2 project in Sunnyvale
- From: Kevin Pierpoint
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- From: icer world
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- [SI-LIST] ASIC design, DDR2 project in Sunnyvale
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- [SI-LIST] DDR2 design issues?
- From: icer world