[SI-LIST] DDR2 SODIMM AT SPEEDS ABOVE 533Mbps

I am using a Virtex-4 FPGA in a new design. I have provided two sodimm 
connectors. I am using 2T (common address and command bus)topology. I tried 
simulating it with 2GB SODIMM modules from micron. The address and command 
signals are not even passing the sstl valid levels when the speed is beyond 
200MHz. But below 200MHz it is operating fine.  I am planning to operate the 
SODIMM's at 666Mbps.  In simulation we used, SSTL18_IO, SSTL18_I_DCI_O, 
SSTL18_II_DCI_O buffers but the results are the same. The routed trace length 
is just less than 5inches.
Thanks
Samuel
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