[SI-LIST] Re: DDR2 2-slot design preference...

Hi Chris,
Can you explain why you're such a big fan of the vias around the edge?
It doesn't appear that you're worried about the resonances addressed
here.

Just curious,
Jeff Loyer


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Chris Cheng
Sent: Tuesday, October 30, 2007 11:40 AM
To: pritchard_jason@xxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DDR2 2-slot design preference...

Before I started I have to say I am also a big fan of ground via =3D
stitching around edges of PCB.
That said. In your experiment, did you provide ground return current =3D
vias near your differential pair transition via ? One can easily design
=3D an experiment where return current path is denied (no ground vias =
near
=3D the signal vias) and it is forced to return through plane coupling
(i.e. =3D to justify thin core capacitance planes) or your via stitching
(to =3D contain the large EMI radiation field). Neither is the correct
solution =3D to the problem which is lack of return current vias.
Another thing to consider is in real live non-backplane PCB's, there are
=3D tens of thousands of ground vias by IC's and passive components =3D
sprinkled around the PCB, it will be hard to find a large piece of =3D
via-less plane to start your resonance.

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of
pritchard_jason@xxxxxxx
Sent: Tuesday, October 30, 2007 10:32 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: DDR2 2-slot design preference...


I contributed to the paper, so I'll try and shed some light on what was
in it...

The purpose of the paper was to explain how high frequency energy can
travel across a PCB and radiate from PCB edges or end up in areas you
didn't expect it to be.=3D3D20

If you spend a little time in the lab taking EMI measurements then you
will find out that if you take any board with high speed serial links
with via transitions or stripline routing, and measure around the edge
of the PCB you will almost always find energy there. The question I
always had was, how did it get there? I have been doing SI for many
years so I typically thought about problems in 2 dimensions. The problem
with EMI is it's 3 dimensional. It is sometimes difficult to predict how
energy will travel. The first step is knowing the mechanisms in which
energy gets diverted and spread out across the PCB.=3D3D20

The first thing we did was set-up simple experiments in SI-Wave to try
and figure out what was going on. We created simplified etch layouts of
the real board that was having problems. We soon came to the conclusion
that via transitions were exciting resonances on the PCB. What we
determined was that the size of your reference plane and the resultant
cavity resonances created between 2 planes caused energy to travel in
the direction of the resonances when excited by via transitions. This
loss of energy to the planes can also be seen in the s-parameters of the
etch. That is essentially the first half of the paper.=3D3D20

We then went into the lab. The experiments were done on a backplane test
board. It only had ground planes. We chose this board because it had SMA
connections and allowed us the flexibility to apply whatever input we
wanted. It also had the same etch/via structures of our problem board,
and proves the point that it doesn't matter if its power or ground. All
you need is 2 metal pieces to create a cavity resonator.=3D3D20

The simulations and lab measurements proved that you could predict where
emissions would occur on a PCB. Did this experiment actually solve a
real problem? Indirectly. Once we knew what mechanisms allowed energy to
go to unwanted places on a PCB you can change the layout to accommodate
this. One solution is to use via stitching along the edge of the PCB to
reduce the impedance so that it cant radiate. This was implemented
because the board slipped into metal clips at the edges of the PCB. If
you can squelch the noise before it gets to the metal clips you can
reduce the amount of energy directly coupled to the chassis. Another
solution would be to make sure your return path impedance is very low
along all of your high speed signals which is very difficult in high
density boards.=3D3D20

You could consider via fencing along the edge of a PCB a "rule of
thumb", but it's a useful one because I have yet to see anyone capable
of looking at a PCB and tell me how the energy is going to travel across
the PCB, couple, and radiate. This is not a 2D SI problem its 3D.
Obviously you could put the work in and simulate it, but that is often
time consuming and not available to most people.=3D3D20

We were going to present the REAL board results at design con in
February but it wasn't in the cards this year.=3D3D20

I am not an EMI "guru". I just wanted to understand what is happening.
Just because you haven't seen it doesn't mean it doesn't exist.=3D3D20

References:=3D3D20
* Reducing Simultaneous switching noise and emi on ground/power planes
by dissipative edge termination. Istvan
* EMI mitigation with multilayer Power Bus Stacks and via stitching of
reference planes. Xiaoning ye, David M. Hockanson, Min Li,.....
* Radiated Emission from a multilayer PCB with traces placed between
power/ground planes. Takashi Harada, Hideki Sasaki, Toshihide Kuriyama
* Reduction in radiated emission by symmetrical power-ground layer
stack-up pcb no open edge. Satoru Haga, Ken Nakano, Osamu Hashimoto
* The Radiation of a rectangular power bus structure at multiple cavity
mode resonances. Marco Leone
* Coupling of through hole signal via to power/ground references and
excitation of edge radiation in multilayer PCB. Jun So Pak, Jingook Kim
.....

-Jason




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