[SI-LIST] DDR Termination

Hi,

I'm looking at a DDR interface which consists of a controller and a =
single SODIMM module.  In the past we've successfully simulated, built =
and tested this interface using only series terminations but have always =
run it fairly slow, 100MHz or 133MHz.   As we crank up the clock on =
future designs I'm starting to wonder if we should switch to the more =
standard series+parallel termination scheme.  Aside from the increased =
over and undershoot and any resulting EMI issues, I don't see a big =
difference between the 2 approaches.  If anything, the series only =
approach appears to give me better noise margin due to the increased =
swing.  Should I be concerned about using the series termination only =
approach when running at higher speeds, say 166MHz or 200MHz?  What =
areas should I be concerned about?

Thanks

Steve
 =20
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