[SI-LIST] Re: Current Return Path

Vinu,
The board mates to another board with drives on it.
Ken
-----Original Message-----
From: Vinu Arumugham [mailto:vinu@xxxxxxxxx]
Sent: Thursday, June 26, 2003 12:54 PM
To: kfrobinson
Subject: Re: [SI-LIST] Re: Current Return Path


If no ICs are populated, how (what points were used to launch, what=20
signal source) was the line driven?

Thanks,
Vinu

kfrobinson@xxxxxxxxxx wrote:

>Jim,
>The Caps I removed were between Vterm and Ground.  Vterm is the =3D
>terminating voltage not the supply to the driver.  The signal in =3D
>question runs the length of the board and is terminated at the end with =
=3D
>a pull up resistor to Vterm.  There were no ICs populated on the board. =
 =3D
>I was basing my comparison of the before and after scope shots on wave =
=3D
>shape. =3D20
>Ken =3D20
>
>-----Original Message-----
>From: James.Freeman@xxxxxxxxxxxx [mailto:James.Freeman@xxxxxxxxxxxx]
>Sent: Thursday, June 26, 2003 12:01 PM
>To: kfrobinson
>Subject: RE: [SI-LIST] Current Return Path
>
>
>Hi,
>       Since the signals are referenced to VTERM, removing the caps from the =
=3D
>VD supply only has no effect. I  assume that there were bypass caps =
from =3D
>the VTERM to VSS or there was a ZBC layer somewhere. If there were =3D
>bypass caps to VTERM, you can remove those to disrupt the return path. =
=3D
>If the board has a plane level bypass( not shown in your stackup but =
=3D
>still could be possible with split planes) then removing the VTERM to =
=3D
>VSS caps wouldn't have any effect either.
>
>Thanks
>Jim Freeman
>
>-----Original Message-----
>From: kfrobinson@xxxxxxxxxx [mailto:kfrobinson@xxxxxxxxxx]=3D20
>Sent: Thursday, June 26, 2003 8:43 AM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Current Return Path
>
>
>All,
>I was recently evaluating a board design and noticed that some signals =
=3D
>=3D3D
>were referenced to a power plane(VTERM) and some nets were referenced =
to =3D
>=3D3D
>ground.  This is a very large board 13" x 22" and there are bypass caps =
=3D
>=3D3D
>between the power plane and ground plane around the perimeter of the =
=3D3D
>board.  I thought I would see if I could destroy the current return =
path =3D
>=3D3D
>by removing all the bypass caps between the power plane and ground =
plane =3D
>=3D3D
>except from the far end of the board furthest from the driver.  I then =
=3D
>=3D3D
>looked at the signals that were referenced to the power plane and they =
=3D
>=3D3D
>were identical to what they had been before the removal of caps.   I =
=3D3D
>took scope shots at multiple locations before and after the cap =
removal. =3D
>=3D3D
>The net in question runs the length(22") of the board right down the =
=3D3D
>center.  I had expected to see a pronounced change, but did not see =
one. =3D
>=3D3D
> Any thoughts?
>
>Stack up
>s
>vterm
>s
>s
>vcc
>gnd
>vcc
>gnd
>s
>s
>gnd
>s
>
>Ken Robinson
>kfrobinson@xxxxxxxxxx
>
>
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