[SI-LIST] Re: Current Return Path

Jim,
The Caps I removed were between Vterm and Ground.  Vterm is the =
terminating voltage not the supply to the driver.  The signal in =
question runs the length of the board and is terminated at the end with =
a pull up resistor to Vterm.  There were no ICs populated on the board.  =
I was basing my comparison of the before and after scope shots on wave =
shape. =20
Ken =20

-----Original Message-----
From: James.Freeman@xxxxxxxxxxxx [mailto:James.Freeman@xxxxxxxxxxxx]
Sent: Thursday, June 26, 2003 12:01 PM
To: kfrobinson
Subject: RE: [SI-LIST] Current Return Path


Hi,
        Since the signals are referenced to VTERM, removing the caps from the =
VD supply only has no effect. I  assume that there were bypass caps from =
the VTERM to VSS or there was a ZBC layer somewhere. If there were =
bypass caps to VTERM, you can remove those to disrupt the return path. =
If the board has a plane level bypass( not shown in your stackup but =
still could be possible with split planes) then removing the VTERM to =
VSS caps wouldn't have any effect either.

Thanks
Jim Freeman

-----Original Message-----
From: kfrobinson@xxxxxxxxxx [mailto:kfrobinson@xxxxxxxxxx]=20
Sent: Thursday, June 26, 2003 8:43 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Current Return Path


All,
I was recently evaluating a board design and noticed that some signals =
=3D
were referenced to a power plane(VTERM) and some nets were referenced to =
=3D
ground.  This is a very large board 13" x 22" and there are bypass caps =
=3D
between the power plane and ground plane around the perimeter of the =3D
board.  I thought I would see if I could destroy the current return path =
=3D
by removing all the bypass caps between the power plane and ground plane =
=3D
except from the far end of the board furthest from the driver.  I then =
=3D
looked at the signals that were referenced to the power plane and they =
=3D
were identical to what they had been before the removal of caps.   I =3D
took scope shots at multiple locations before and after the cap removal. =
=3D
The net in question runs the length(22") of the board right down the =3D
center.  I had expected to see a pronounced change, but did not see one. =
=3D
 Any thoughts?

Stack up
s
vterm
s
s
vcc
gnd
vcc
gnd
s
s
gnd
s

Ken Robinson
kfrobinson@xxxxxxxxxx


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