[SI-LIST] Re: Current Return Path

Hi Ken,
If your bypass caps are far away from your signal path, their effect is =
negliglible.  I'm hoping your signals that are referenced to Vterm are =
referenced to that same plane within the chips.  If not, their path from =
Vterm to GND is probably provided by the inter-plane capacitance.  Your =
stackup doesn't look like it provides much of that.  It's possible that =
within the chips the stackup is such that Vterm is adjacent to GND, =
providing a good return current.

There's been quite a bit of discussion about this issue before - you =
might search in the SI archives under "reference plane" or perhaps my =
name.


Jeff Loyer


-----Original Message-----
From: kfrobinson@xxxxxxxxxx [mailto:kfrobinson@xxxxxxxxxx]
Sent: Thursday, June 26, 2003 8:43 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Current Return Path


All,
I was recently evaluating a board design and noticed that some signals =
=3D
were referenced to a power plane(VTERM) and some nets were referenced to =
=3D
ground.  This is a very large board 13" x 22" and there are bypass caps =
=3D
between the power plane and ground plane around the perimeter of the =3D
board.  I thought I would see if I could destroy the current return path =
=3D
by removing all the bypass caps between the power plane and ground plane =
=3D
except from the far end of the board furthest from the driver.  I then =
=3D
looked at the signals that were referenced to the power plane and they =
=3D
were identical to what they had been before the removal of caps.   I =3D
took scope shots at multiple locations before and after the cap removal. =
=3D
The net in question runs the length(22") of the board right down the =3D
center.  I had expected to see a pronounced change, but did not see one. =
=3D
 Any thoughts?

Stack up
s
vterm
s
s
vcc
gnd
vcc
gnd
s
s
gnd
s

Ken Robinson
kfrobinson@xxxxxxxxxx


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