[SI-LIST] Re: Common-mode noise on LVD Drivers

Ravinder, Depending on the configuration of the driver, and at the expense 
of the leading edge rate, you can use a low value X2Y cap on the driving 
end with one each of the A and B terminals attached to the differential 
signals, and the G1/G2 terminals both attached to logic ground.  This is 
the so-called "circuit 1" configuration.  The magnetic coupling between the 
A and B circuits will greatly equalize the net current launched into the 
transmission lines beyond the capacitor.
Regards,


Steve.
At 01:48 PM 3/29/2004 -0800, Lee Ritchey wrote:
>Ravinder,
>
>There are a couple of ASIC suppliers who have package design problems that
>lead to common mode problems in the form of Vcc and ground bounce.  If you
>have one of those, there is nothing you can do at the board level to fix
>the problem.
>
>Lee
>
>
> > [Original Message]
> > From: <Ravinder.Ajmani@xxxxxxxx>
> > To: <si-list@xxxxxxxxxxxxx>
> > Date: 3/29/2004 9:13:16 AM
> > Subject: [SI-LIST] Common-mode noise on LVD Drivers
> >
> > Hi All,
> > There was a thread some time back about differential to common-mode
> > conversion.  My problem is also in this area.  I have two similar ASICs
> > with multiple LVD drivers.  On one ASIC, I measure common-mode noise
>about
> > 20 dB higher than the other.  Even within this ASIC, some bits show about
> > 6 dB more common-mode compared to the quietest bits.  The two ASICs are
> > from different vendors, and the one with higher CM noise uses faster 11
>uM
> > technology.  I don't know the technology of the other ASIC, but its die
> > size is considerably larger.  This high common-mode noise is causing EMI
> > problem, which I am trying to fix.  I have tried changes in the card
> > decoupling scheme but it does not make any difference.  I am convinced
> > that the common-mode noise is coming out of the ASIC, and the PCB
> > improvements may not help.  Is there any way to come to a definite
> > conclusion about this, and is there anything I can do besides placing
> > common-mode ferrite beads on every driver pair.
> > The ASIC uses a core voltage of 1.8V, and has on-board regulators to
> > regulate 3.3V input to 1.8V.
> > I will really appreciate your help in solving this puzzle.
> > Regards, Ravinder
> > Server PCB Development
> > Hitachi Global Storage Technologies
> >
> > Email: Ravinder.Ajmani@xxxxxxxx
> >
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>
>
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Steve Weir
Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
(503) 239-5536
http://www.teraspeed.com
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