[SI-LIST] Cisco Job - Technical Lead - Signal and Power Integrity (SI) Engineering

From: "Sadakathullah Mohamed Ali (mohamali)" <mohamali@xxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Tue, 15 Dec 2009 10:33:58 -0800

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Hi Members,
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Cisco's gigabit Systems Business Unit is actively looking to hire a
Technical lead with SI experience.
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If anyone is interested please feel free to email me at mohamali AT
cisco DOT com
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The position is a Technical Leader for the Gigabit Systems Business Unit
(GSBU) in Signal and Power Integrity focused on Catalyst 4K HW System
Development, Design, and Validation.=20
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Job functions include board stackup definition, board placement and high
speed routing rules, IO/package/board system signal integrity and timing
analysis, connector modeling, power integrity analysis and decoupling
rules for chip/package/board. Must have experience with high speed (> 5
Gbps) simulation and lab verification. Must work well in teams, will
work with ASIC, system board designers, SW diag, and CAD teams. Will
interface with external suppliers. Should have experience with HSPICE,
Matlab, AMI, HFSS, Sigrity tools, and TDR/TDT, VNA, BertScope,
Wavecrest, Phase Noise measurements. Other tools include Cadence MGH,
Agilent ADS, Mentor ADMS. Must have a minimum of 5-7 years of RELEVANT
work experience, and a BSEE. MSEE and PhD preferred.
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Mohamed Ali
Career Services Manager
CDO - Staffing (SAVBU, BWBU, CDO)
Twitter: http://twitter.com/Cisco_UCS

mohamali@xxxxxxxxx
Phone: 408-853-3523
Fax:     423-477-8591

Cisco Systems, Inc.
170 West Tasman Drive,
San Jose, CA 95134-1706



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[SI-LIST] Cisco Job - Technical Lead - Signal and Power Integrity (SI) Engineering

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