[SI-LIST] Re: Cin in IBIS models

The IBIS V2.1 Specification says "C_comp defines the silicon die
capacitance.  This value should not include capacitance of the package."


-----Original Message-----
From: Perry Qu [mailto:perry.qu@xxxxxxxxxxx]
Sent: Monday, December 17, 2001 2:29 PM
To: arpad.muranyi@xxxxxxxxx
Cc: si_list
Subject: [SI-LIST] Re: Cin in IBIS models



Hi!

Related to this question, is it good enough to represent the on-chip
parasitics with just a C_comp ? How about R and L ?

I had a case with one vendor about their receiver model: for some of the
pins, the on-chip parasitics are even bigger compared with packaging RLCs.
I was told that these on-chip parastics represent routing parasitics from
C4 pads to the actual receiver; Wondering how IBIS model take these into
account ?

Thanks

Perry

"Muranyi, Arpad" wrote:

> Bob,
>
> The C_comp capacitance must represent what you see when you look into
> the die at the die pad.  This includes the die pad, metal connections
> on the die, the driver transistor's capacitance, the receiver (input)
> capacitance, everything that is on the die.  Package, pin, ball, and
> other stuff is modeled in the package model section of the IBIS model.
>
> Arpad Muranyi
> Intel Corporation
> ======================================================================
>
> -----Original Message-----
> From: Bob Patel [mailto:whizplayer@xxxxxxxxx]
> Sent: Monday, December 17, 2001 10:27 AM
> To: si_list
> Subject: [SI-LIST] Cin in IBIS models
>
> Hi! Is the input capacitance for a pin included in the
> IBIS models, I know the pad capacitance is by using
> C_comp. Also, when using output buffers do I have to
> model the output capacitance as an external capacitor
> and the input capacitance as an external capacitor.
> Thanks in advance
> Bob
>
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--
Perry Qu

Product Integrity         |      600 March Road
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