[SI-LIST] Capacitance and excess propagation time of via

Dear Sogo Hsu,
The formula you quote for capacitance is a fairly gross
approximation (mostly an OVER-estimate). It's useful for
checking if the capacitance is small enough to simply
ignore, but not good for detailed analysis (as you found
out). 

I've presented some much better data about both capacitance
and inductance of vias in my new book (and the class that
accompanies it), High-Speed Signal Propagation. 

If the vias are sufficiently close you could be seeing some
via coupling that affects the problem -- looking at the
layout in side profile it reminds me of a serpentine trace,
for which the delay is often (if you squash the traces too
close) less than you might have expected. In the absence of
via coupling I would have expected the delay to strictly
increase as the number of vias is increased. 

If you build another board, make it REALLY THICK and use
REALLY HUGE vias, that way all the effects you are trying to
measure will be magnified to a level where they become easy
to measure. 

Best regards,
Dr. Howard Johnson, Signal Consulting Inc., 
tel +1 509-997-0505,  howie03@xxxxxxxxxx
http:\\sigcon.com  -- High-Speed Digital Design seminars,
books, and articles



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Sogo Hsu
Sent: Tuesday, March 23, 2004 3:44 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Capacitance and excess propagation time
of via


Hi, SI Gurus,

The capacitance of via was usually estimated by the formula
as below

C =3D 1.41 epsilon_r * T * D1 / (D2 =A1VD1).

The definition of T is the total thickness of PCB by
refering Dr.
Johnson=A1=A6s black magic bible. It seems like that the
formula implied
the capacitance is formed by plate capacitor where the area
is
constructed by the conducted via body and space is (D2-
D1)/2. Is it
reasonable for a multi-layer PCB structure? In my opinion,
the only
effective thickness is the total thickness of pwr/gnd plane
which
the via passing through. Therefore, I think the estimation
of
capacitance is over-estimate. The full wave analysis
results, such
as HFSS, also presented the characteristic of via is
inductive
dominantly. That is said, via did not have such large
capacitance
inherently.

Besides, we also tried to estimate the excess propagation
time when
the signal traveling through via. Two cases are under
consideration
as below.
The test vehicle is a 4-layer PCB.

Case I.
(Top) =3D=3D=3D=3D=3D
=3D=3D=3D=3D=3D=3D=3D=3D=3D
         ||                                          ||
         ||                                          ||
         ||                                          ||
(Bottom)
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=3D=3D=3D=3D=3D=
3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
Case II
(Top)=3D=3D=3D=3D=3D
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=3D=3D=3D=3D=3D=3D=3D=3D=3D
        ||         ||                ||            ||
        ||         ||                ||            ||
        ||         ||                ||            ||
(Bottom)=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D
=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D

The total trace length is same to each other. The
propagation time
was measured by TDT. The excess propagation time caused by
via can
be obtained by subtracting with the propagation delay of
microstrip
in equal length. The excess propagation time per unit via
for Case
II is obviously faster in a factor of 60% than Case I as
well. Does
any one meet this phenomenon before? It is suspect that is
the
result of via coupling? I hope any expert can give me a
reasonable
explanation on this phenomenon. Thank you in advance.

Sogo Hsu, Ph. D.
Foxconn Electronic



------------------------------------------------------------
------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the
Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject
field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:
                http://www.freelists.org/archives/si-list
or at our remote archives:
        
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu




-- Binary/unsupported file stripped by Ecartis --
-- Type: application/ms-tnef
-- File: winmail.dat


------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field

or to administer your membership from a web page, go to:
http://www.freelists.org/webpage/si-list

For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field

List FAQ wiki page is located at:
                http://si-list.org/wiki/wiki.pl

List technical documents are available at:
                http://www.si-list.org

List archives are viewable at:     
                http://www.freelists.org/archives/si-list
or at our remote archives:
                http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
                http://www.qsl.net/wb6tpu

Other related posts: