[SI-LIST] Re: Capacitance and excess propagation time of via

There are many different causes that might be causing your problems.  Every
discontinuity will cause some of the energy to be reflected back to the
source.  Every feed through will likely look like a low pass
filter/discontinuity. How good are your launches into and out of the board?
Poor launches will degrade bandwidth.  Are the launches the same in all
cases? Hopefully you are not soldering coax into the board to make these
measurements. How much time difference are you seeing out of how long of a
trace?   etc.

You should not be measuring time delays with a TDR, since any decrease in
bandwidth on one trace vs. the other changes the slope of the output
waveform.  Are you measuring delay time or a decrease in bandwidth (increase
risetime)?  I'd use sine waves to measure delay (VNA works great for this).

Tom Dagostino
Teraspeed Consulting Group LLC
Device Modeling Division
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@xxxxxxxxxxxxx <mailto:tom@xxxxxxxxxxxxx>


Teraspeed Consulting Group LLC
2926 SE Yamhill St.
Portland, OR 97214
http://www.teraspeed.com

Teraspeed (SM) is the service mark of Teraspeed Consulting Group LLC


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Istvan NOVAK
Sent: Tuesday, March 23, 2004 6:42 PM
To: sogo.hsu@xxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Capacitance and excess propagation time of via


Sogo,

Assuming that the measurement procedure is perfect and your
collected data has no error, one possible reason is that your
edge gradually slows down as it passes through the discontinuities,
and the incremental extra delay will asymptotically converge to a
value that you could measure with a very slow input edge.

Regards,
Istvan



----- Original Message -----
From: "Sogo Hsu" <sogo.hsu@xxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Tuesday, March 23, 2004 7:29 PM
Subject: [SI-LIST] Capacitance and excess propagation time of via


> Hi, Gurus,
>
> Sorry to my ambiguity ASCII code in the previous message. I try to
> send the mail again.
>
> The capacitance of via was usually estimated by the formula as below
>
> C =3D 1.41 epsilon_r * T * D1 / (D2 =A1VD1).
>
> The definition of T is the total thickness of PCB by refering Dr.
> Johnson's black magic bible. It seems like that the formula implied
> the capacitance is formed by plate capacitor where the area is
> constructed by the conducted via body and space is (D2- D1)/2. Is it
> reasonable for a multi-layer PCB structure? In my opinion, the only
> effective thickness is the total thickness of pwr/gnd plane which
> the via passing through. Therefore, I think the estimation of
> capacitance is over-estimate. The full wave analysis results, such
> as HFSS, also presented the characteristic of via is inductive
> dominantly. That is said, via did not have such large capacitance
> inherently.
>
> Besides, we also ! tried to estimate the excess propagation time
> when the signal traveling through via. Two cases are under
> onsideration as below. The test vehicle is a 4-layer PCB.
>
> Case I
> (TOP) ====                                             ======
>          ||                                           ||
>          ||                                           ||
>          ===============================================
> (Bottom)
>
> Case II
> (Top)
>      ====               ===============               ======
>         ||              ||           ||               ||
>         ||              ||           ||               ||
>         =================            ==================
> (Bottom)
>
> Case I consists of two vias for layer change and Case II has four
> vias. The total trace length is same to each other. The propagation
> time was measured by TDT. The excess propagation time caused by via
> can be obtained by subtracting with the propagation delay of
> microstrip in equal length. The excess propagation time per unit via
> for Case II is obviously faster in a factor of 60% than Case I as
> well. Does any one meet this phenomenon before? It is suspect that
> is the result of via coupling. I hope any expert can give me a
> reasonable explanation on this phenomenon. Thank you in advance.
>
> Sogo Hsu, Ph. D.
> Foxconn Electronic
>
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