[SI-LIST] Re: [Bulk] Re: PCB Impedance Failure
- From: Ihsan Erdin <erdinih@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 13 Jan 2006 13:10:17 -0500
At the risk of deviating from the original topic, I'd like to make some
comments on the calculation of differential impedance I've seen in this
thread. I guess sqrt(L_mutual/C_mutual) is meant by the term "coupling
impedance" but I doubt it has any meaningful value. The differential
impedance can be found by decomposing the coupled transmission line circuit
into its odd and even mode components and multiplying the odd-mode impedance
by 2. That results in sqrt( 2*(L_self-L_mutual)/( 0.5*C_self +C_mutual) ).
The formulation assumes the elements of the pair are identical.
Regards.
Ihsan
On 1/12/06, Ken Cantrell <Ken.Cantrell@xxxxxxxxxxxxxxxx > wrote:
>
> Ludwig,
> Re: "I don't think anyone was claiming that one can achieve 100 Ohm
> differential impedance using 50 Ohm SE traces."
> I use 50 ohm SE, 100 ohm diff all the time. Example: stripline, trace and
> plane thicknesses 0.64 mils, permittivity 4.0, dielectric thicknesses 4
> mils, trace width 3.25 mils, run the pair on 15 mil centers. SE is 49.5,
> Diff is 98.5. If I get 97 - 100 ohm diff, things work great, and I'm sure
> it could be looser than that and still work fine for standard LVDS type
> implementations. As someone else stated, this type of geometry (loosely
> coupled spacing), although it yields a lower routing density, allows for a
> smooth impedance transition in the pin field escape area since the
> increased
> trace separation has little effect on the diff impedance.
> If you need to go to higher routing densities, then the SE impedance must
> be
> increased as you have pointed out.
>
> Clayton,
> If the board house can't produce a good cupon, I would get a re-spin soley
> on those grounds. Be patient though, stuff happens.
>
> Ken
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto: si-list-bounce@xxxxxxxxxxxxx ]On Behalf Of Stefan Ludwig
> Sent: Thursday, January 12, 2006 8:08 AM
> To: tom@xxxxxxxxxxxxx
> Cc: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: [Bulk] Re: PCB Impedance Failure
>
>
> Hi Tom,
>
> Just a clarification: I don't think anyone was claiming that one can
> achieve 100 Ohm differential impedance using 50 Ohm SE traces. Given a
> constant distance to the reference plane(s), your differential pairs of
> 100 Ohm will be built using, say, 60 Ohm SE traces of a certain width
> and of a certain separation.
>
> Your 50 Ohm SE traces on the same layer will have a different width
> (wider) than the 60 Ohm SE traces. If you'd calculate the differential
> impedance of two such 50 Ohm SE traces, given the same separation, you'd
> end up with less than 100 Ohms.
>
> Zdiff = 2*Z0*(1-a*exp(-b*D/H))
> with a, b = positive constants, D = trace separation, H = height
> over/between reference plane.
>
> The exponential term of trace separation is what you refer to as
> coupling impedance. But the point is that you can achieve Zdiff = 2*Z0
> only if the distance between the traces goes to infinity.
>
> In any case, the board house didn't deliver the goods and Clayton should
> either ask for a refund or a respin of the board. The message, however,
> sounded like there was no time for a respin, hence his request for
> information.
>
> Cheers,
>
> Stefan Ludwig
>
> Tom Dagostino wrote:
>
> >Kai
> >
> >I think you are missing the point. The board was designed to have 50 Ohm
> SE
> >traces and at the same time 100 Ohm differential traces. What was
> received
> >was 59 Ohm SE traces and 86 Ohm differential traces. When the impedance
> of
> >the SE traces increases the differential impedance should also increase.
> >The differential impedance is 2*SE - coupling impedance. If we assume
> the
> >coupling did not change significantly since the original was no coupling
> the
> >as fabricated board's impedance should have been 118 Ohms.
> >
> >Tom Dagostino
> >Teraspeed(R) Labs
> >13610 SW Harness Lane
> >Beaverton, OR 97008
> >503-430-1065
> >tom@xxxxxxxxxxxxx
> > www.teraspeed.com
> >
> >Teraspeed Consulting Group LLC
> >121 North River Drive
> >Narragansett, RI 02882
> >401-284-1827
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx
> >[mailto: si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Kai Keskinen
> >Sent: Wednesday, January 11, 2006 2:47 PM
> >To: Aubrey_Sparkman@xxxxxxxx ; a.ingraham@xxxxxxxx; si-list@xxxxxxxxxxxxx
> >Subject: [SI-LIST] Re: [Bulk] Re: PCB Impedance Failure
> >
> >
> >Aubrey:
> >
> >That is really easy. Just closely couple the diff pairs and you can go
> from
> >60 Ohms single ended to 90 Ohms differential with very little effort. It
> is
> >not really what you want to do if you have complicated routing through
> pin
> >fields since you then get a huge impedance hit if you have to separate
> the
> >pairs. Just use any field solver that handles diff pairs and try it. Set
> up
> >a 60 Ohm single ended line. Use the same cross-section and add the second
>
> >line and move them closer together. You will get a lot lower than 2x
> single
> >ended impedance.
> >
> >Cheers,
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx
> >[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of
> > Aubrey_Sparkman@xxxxxxxx
> >Sent: Wednesday, January 11, 2006 1:45 PM
> >To: a.ingraham@xxxxxxxx; si-list@xxxxxxxxxxxxx
> >Subject: [Bulk] [SI-LIST] Re: PCB Impedance Failure
> >
> >
> >I'm a little puzzled about something else. Did you really get the diff
> >impedance to be on the low side (100->86) on the same board / layer
> >where the single ended impedance is on the high side (50->59)? Please
> >explain how that was done!
> >
> >
> >Aubrey Sparkman=20
> >Enterprise Engineering Signal Integrity Team
> >Dell, Inc.=20
> >Aubrey_Sparkman@xxxxxxxx=20
> >(512) 723-3592
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> >On Behalf Of Andrew Ingraham
> >Sent: Wednesday, January 11, 2006 11:40 AM
> >To: si-list@xxxxxxxxxxxxx
> >Subject: [SI-LIST] Re: PCB Impedance Failure
> >
> >Clayton,
> >
> >I was a little puzzled about two things you stated.
> >
> >One, that the specified differential impedance was exactly twice the
> >specified single trace impedance. That requires no coupling between
> >traces of a differential pair (if they are routed on the same layers
> >with the same trace widths). Is that what you really intended? Since
> >you got 86 ohms diff. and 59 ohms s.e., your differential pairs must not
> >have been routed with nearly enough isolation.
> >
> >The other is about the error on the test coupon. Can you trust any
> >measurements on those coupons?
> >
> >Did your company actually specify 50 +/- 10%, or was that only a
> >recommendation? If it was in the spec, then I wouldn't even bother
> >asking about the risk; I'd send the boards back to the board vendor and
> >tell them to make new ones that satisfy what you paid them to do. The
> >fact that they were made wrong, is reason enough to be concerned.
> >
> >Regarding the question of the impact on SI, that depends entirely on the
> >application, on how long the traces are (vs. risetimes and/or frequency
> >content), on the types of signals, on the chips used, and if and how
> >lines are terminated. Sometimes it makes little difference whether the
> >actual impedances are even close to the target. Sometimes it makes all
> >the difference. 59 ohms isn't that far from 50 ohms, but if you were
> >using leading edge technologies and pushing all the margins (which you
> >probably aren't, since you didn't use SI tools), it could indeed be
> >significant.
> >
> >Regards,
> >Andy Ingraham
> >
> >
> >
> >>A board we just had fabricated failed the impedance test coupon. 59=20
> >>ohm vs 50+/- 10%. They could not measure the diffferential pairs=20
> >>because of an error on the coupon, but calculated 86 ohm impedance vs=20
>
> >>100 +/- 10%
> >>
> >>
> >
> >
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> --
>
> Ludwig Systems Engineering Consulting - Design - Implementation
> WWW: www.ludwigsystems.com System Architectures - FPGAs - PCBs
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