[SI-LIST] Re: [BULK] - s2ibis2 extreme currents

As stated, this is a common occurrence when making IBIS from SPICE models.
a few things you can do:

1) You may be able to just ignore it. Since this is a common thing, many
simulators will still "do the right thing" in these circumstances,
especially since they usually occur well outside of the voltage ranges that
will occur during simulation. Talk to your particular tool vendor.

2) You can put a little resistance in series with the SPICE overshoot
diodes. (like you are simulating the resistance of the package and chip).
This will eliminate freakish currents and will usually not change the
simulation at all. (Of course, if it doesn't change the simulation, why do
it?)

3) Compare your IBIS results with the huge currents to your spice results on
the same circuit (one with lots of overshoot). If they compare well, then
your IBIS model is as good as your spice model. This is pretty much as good
as you can expect, unless you want to go complain to the spice model vendor.


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Henrik G. Madsen
Sent: Wednesday, June 16, 2004 7:13 AM
To: steimle@xxxxxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: [BULK] - s2ibis2 extreme currents


It is unfortunately 'normal'.

Most Spice models are not created to be valid/work when a signal outside =
the rail voltages is applied.

The normal cause is one or both of the below
* The clamp diodes do not include any loss
* The BSIM3v3 transistor model do not include any loss for its paracitic =
diodes

Both of the above issues can be 'fixed'

/Henrik


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Eric Steimle
Sent: 16. juni 2004 15:56
To: si-list@xxxxxxxxxxxxx
Subject: [BULK] - [SI-LIST] s2ibis2 extreme currents


I've been trying for a few weeks to get some decent IBIS models from our
hspice decks.  I'm working on a single tristate driver, with 3.3V I/O
and 1.8V core.  I finally have something that looks reasonable but when
running it through the golden parser (actually Hyperlynx's Visual IBIS
editor check),  I get "Extreme currents present in TYP GND_Clamp VI
Curve" messages.  Now I look in the file and I see the extreme currents
start at around 3.7V in the pullup section and around -0.9V in the
GND_CLAMP section.   These currents are in the 70A and -90 Amp and
higher ranges respectively
=20

Does anyone have any experience with these kind of results?  Am I doing
something wrong or is this something I'm supposed to know to fix
manually?  I'm a little new at this model conversion stuff so any advice
would be appreciated.

=20

Thanks.

Eric



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