[SI-LIST] BGA vias outside the package

Would like to understand the effects of supplying power and ground to the
BGA by connecting
vias to the VCC/GND plains and traces outside the BGA package. 

Pros: Allows for larger vias outside the package.
Cons: Compromised noise performance through trace length added to VCC/GND
trace length.

Is there something else that needs to be taken care of....

The BGA device is a CPLD, IO=3.3V, Core=1.8V, Fmax = 180MHz, VCCO(3.3V) - 11
pins, VCC(1.8V) - 4 pins, GND - 15 pins
The device is a 132csBGA, 0.5mm pitch, 0.3mm pad. So cannot afford to drop
the vias within the BGA area. Microvias would be too expensive...

Ryan




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