[SI-LIST] Re: Active capacitance canceling circuitry

Probably a silly idea, but if you put a negative capacitor (created with a 
negative impedance convertor NIC) in parallel then your resulting 
capacitance might be very low.
Kind regards
Boris Traa

System design engineer EMC

Philips Applied Technologies/EM&C Competence Center
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5656AE Eindhoven, The Netherlands
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Fax: ++ 31 40 27 42224
E-mail:  boris.traa@xxxxxxxxxxxx Seri: nlv09273@nlwayhp

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Gary Morrell 
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[SI-LIST] Active capacitance canceling circuitry
Classification







This is more of an analog question but I'd thought I'd pick the collective 
wisdom here.

I'm working on recovering AC signals from some very small capacitors, 
typically 100 to 300fF (Yep, femtoFarads, 1 X 10^-15F). The capacitor is 
driven by a small amplitude RF sine source, the other terminal is loaded 
with a high value resistor, typically selected to be about equal to the 
reactance of the capacitor under test at the RF excitation frequency. 
Simple circuit, right? Problem is, anything I connect to the junction 
between the capacitor-under-test and the resistor load has waaaay more 
stray capacitance then the capacitor of interest, the result being that 
the stray C in parallel with the load resistor load drops the effective 
load impedance, and the SNR goes kaput in a hurry. Even op-amps with very 
high bandwidth can have differential and/or common mode input capacitance 
of 2 to 4 pF. 

I've used active parasitic capacitance canceling circuits on MOS 
microprobes and some active O'scope probes, but has anyone here actually 
seen one of these active capacitance cancellation circuits? MOS 
microprobes typically have <40fF of input capacitance, 10^-14A of input 
leakage and bandwidth to 300MHz; I'd love to get my mitts on a circuit 
that would perform even close to these specs, build it and play with it 
some.

Regards,

Gary M.

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