[SI-LIST] Re: About HSTL and LVDS I/Os
- From: "D. C. Sessions" <si-list@xxxxxxxxxxxxxxxx>
- To: "'SI-LIST'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 21 Jan 2002 07:03:29 -0700
On Sunday 20 January 2002 22:53, you wrote:
# Hi All,
# I am interested in HSTL and LVDS I/Os.
# I wanted to get info about latest available I/Os in 0.13 and 0.18 in
terms of,
# 1) Pad pitch
# 2) Power dissipation,
# 3) Max frequency supported,
# 4) Max trace length supported,
# 5) Can be staggered or not.
#
# Waiting for your reply.
*WAY* off-topic here. Besides, this is all vendor-specific.
--
| The race is not always to the swift, nor the battle to the strong. |
| Because the slow, feeble old codgers like me cheat. |
+--------------- D. C. Sessions <dcs@xxxxxxxxxxxxxxxx> --------------+
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- References:
- [SI-LIST] About HSTL and LVDS I/Os
- From: Sachin Kadu
Other related posts:
- » [SI-LIST] About HSTL and LVDS I/Os
- » [SI-LIST] Re: About HSTL and LVDS I/Os
- [SI-LIST] About HSTL and LVDS I/Os
- From: Sachin Kadu