[SI-LIST] About HSTL and LVDS I/Os

Hi All,
    I am interested in HSTL and LVDS I/Os.
    I wanted to get info about latest available I/Os  in 0.13 and 0.18 in terms 
of,
    1) Pad pitch 
    2) Power dissipation,
    3) Max frequency supported, 
    4) Max trace length supported,
    5) Can be staggered or not.
    
    Waiting for your reply.

Regards,
Sachin


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