[SI-LIST] AW: DDR Eye diagrams

Hi David,

there are two methods I usually use (but I not really like both of them)

Usually Write and Reads are different in high and low levels. So do an =
A-B event trigger, e.g. you want to take a Write (measured at the DRAM), =
connect a probe to another DQ channel at the controller and set the =
level so high only a Write is catched. now you should have another probe =
on the DQS at the DRAM to have a B event, and you can create an eye =
timing referenced to the DQS for Writes at the DRAM (of course including =
trigger jitter of the scope).
If you use the clock as B event you should capture DQ and DQS for the =
dataeye. Therefore you are missing the bit by bit correlation DQ to DQS =
(assuming you are using a RT scope), but without this correlation you =
might see the worst case that can happen over a long period of time more =
likely!

Another way is to check the WE and RAS signal, and do some kind of logic =
triggering.

regards

Hermann

-----Urspr=FCngliche Nachricht-----
Von: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
Im Auftrag von Novak David
Gesendet: Mittwoch, 28. Juli 2004 05:19
An: si-list
Betreff: [SI-LIST] DDR Eye diagrams


For measuring DDR eye diagrams, the best location to measure reads is at =
=3D the memory controller and the best place to measure writes is at the =
=3D DDR. For example, measuring reads at the DDR will show more =
reflections =3D than actually seen by the memory controller (I should =
mention that I =3D have only series termination).

This sounds simple, but I cannot think of a way to make the scope =3D =
differentiate between reads and writes. You might suggest that I create =
=3D a memory test which only does reads or only does writes. However, my =
=3D worst case signals are when the entire system is running.

Can anyone tell me how to make the scope trigger only on reads or only =
=3D on writes?

Thanks,
David
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