[SI-LIST] Re: AC Coupled Signals
- From: "Chris Cheng" <Chris.Cheng@xxxxxxxx>
- To: "lifeatthesharpend" <lifeatthesharpend@xxxxxxxxx>, <signalintegrity@xxxxxxxxxxx>, <ron@xxxxxxxxxxx>
- Date: Fri, 28 Sep 2007 15:01:27 -0700
I think the point is tuning S22 for the non-ideal load. S12 or S21 =
remains being equal (symmetric).
-----Original Message-----
From: lifeatthesharpend [mailto:lifeatthesharpend@xxxxxxxxx]
Sent: Friday, September 28, 2007 2:44 PM
To: signalintegrity@xxxxxxxxxxx; ron@xxxxxxxxxxx; Chris Cheng
Cc: si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: AC Coupled Signals
What is the total loss at each point? (reciever, driver side of cap, =
receiver side of cap) in dB=20
It seems to stand to reason that if you lose xxx mV when the signal is =
stronger at the driver and some smaller portion of that when the caps =
are placed closer to the recever is normal since loss has ocurred in the =
media. The total signal loss of the system could still be the same.=20
Leonard.=20
----- Original Message ----=20
From: Stephen Zinck <signalintegrity@xxxxxxxxxxx>=20
To: ron@xxxxxxxxxxx; Chris.Cheng@xxxxxxxx=20
Cc: si-list@xxxxxxxxxxxxx=20
Sent: Friday, September 28, 2007 12:19:22 PM=20
Subject: [SI-LIST] Re: AC Coupled Signals=20
Hello SI-LISTers,=20
I thought for my part in this discussion, I should do some due diligence =
on=20
this AC coupling capacitor placement location question.=20
Scott McMorrow, Steve Weir and I had some off-line discussions that =
tended=20
to suggest my position dependency results may have been caused by local=20
resonances from other impedance discontinuities in the system I was=20
simulating. Based on this, I set out to develop a simulation model that =
had=20
a minimum of discontinuities (no backplane vias/connectors/trace, etc.). =
I used:=20
- Spice models of non-linear 3.125Gbit/s silicon (driver and receiver)=20
- S-parameter based package models for both driver and receiver.=20
- A 0.01uF capacitor and its associated parasitics (via, trace, pad, =
mount,=20
component).=20
- 2D lossy W-Element transmission line (with di-electric and skin effect =
losses included).=20
I made the capacitor model such that I could "slide" it up and down a 15 =
inch trace between the driver and receiver. I iteratively simulated for =
the=20
following length combinations:=20
- 500 mil trace from driver to AC coupling capacitor with 14500 mil =
trace to=20
receiver.=20
- 5000 mil trace from driver to AC coupling capacitor with 10000 mil =
trace=20
to receiver.=20
- 10000 mil trace from driver to AC coupling capacitor with 5000 mil =
trace=20
to receiver.=20
- 14500 mil trace from driver to AC coupling capacitor with 500 mil =
trace to=20
receiver.=20
The results show around 125 mV (differential) difference between the=20
capacitor at the source versus the capacitor at the destination, with =
the=20
benefit going to the capacitor placed closest to the receiver. 125 mV is =
a=20
lot to give away...=20
I am not going to pretend to understand the physics behind these results =
but=20
I thought it worth while to at least show the basis for my statements.=20
I would be happy to evolve the simulation environment if someone has a=20
suggestion...=20
I have put together a document that I can post to an ftp site or email =
if=20
anyone would like a copy...=20
Kind regards,=20
Steve=20
Stephen P. Zinck=20
Interconnect Engineering Inc.=20
P.O. Box 577=20
South Berwick, ME 03908=20
Phone - (207) 384-8280=20
Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
Web - www.interconnectengineering.com=20
----- Original Message -----=20
From: "ronald miller" <ron@xxxxxxxxxxx>=20
To: <Chris.Cheng@xxxxxxxx>=20
Cc: <si-list@xxxxxxxxxxxxx>=20
Sent: Tuesday, September 25, 2007 6:34 PM=20
Subject: [SI-LIST] Re: AC Coupled Signals=20
> Chris=20
> If your coupling cap is a problem, get a better cap and design the =
pads=20
> to have no reflection.=20
>=20
> If there are no reflections at the lowest data rate and at the highest =
> data rate, the position does=20
> not matter.=20
>=20
> Now, about the S11 and S22, it is much more intuitive and much easier =
to=20
> deal with TDR and=20
> reflection coefficients, or impedance than it is to deal with the=20
> network analyzer data.=20
>=20
> Although I am a microwave engineer, I have learned the hard way, and =
now=20
> I try to dtay away from=20
> the S-Parameters as models and for analysis because they are clumsy =
and=20
> non-intuitive.=20
>=20
> Ron=20
>=20
> Chris Cheng wrote:=20
>=20
>>Let me try my hand on why position matter.=20
>>=20
>>A normal passive channel is reciprocal. e.g. S12=3D3DS21 It only says =
the =3D=20
>>off diagonal elements are symmetic. It doesn't say the diagonal =
elements =3D=20
>>have to be equal. I believe this was the basis of Jeff Loyer's =3D=20
>>discussion a while ago.=20
>>=20
>>The presence of the discontinuity affects the S11 and S22 dramatically =
=3D=20
>>different based on whether it is close to the Tx or Rx.=20
>>=20
>>In the presences of imperfect loading on the Rx side, it is the =3D=20
>>interaction between the S22 and loading that matters.=3D20=20
>>=20
>>Thus position makes a difference. i.e. we are tuning the S22 with the =
=3D=20
>>non-ideal loading.=20
>>=20
>>QED=20
>>=20
>>-----Original Message-----=20
>>From: si-list-bounce@xxxxxxxxxxxxx=20
>>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of steve weir=20
>>Sent: Tuesday, September 25, 2007 1:35 PM=20
>>To: Jory McKinley=20
>>Cc: Stephen Zinck; Scott McMorrow; leeritchey@xxxxxxxxxxxxx;=20
>>npatel@xxxxxxxxxx; si-list@xxxxxxxxxxxxx=20
>>Subject: [SI-LIST] Re: AC Coupled Signals=20
>>=20
>>=20
>>Jory, I think this is good example of where intuitively appealing=3D20 =
>>misconceptions can seduce one into translating correlation into=3D20=20
>>causation. If you have more ringing in one case than another, it =
means=3D20=20
>>that you have set up a resonance that is more severe in the one case. =
=3D20=20
>>This can easily happen as a result of any number of things going on: =
=3D20=20
>>suboptimal silicon to package launch, suboptimal IC to PCB, via =
stubs,=3D20=20
>>connector transitions, etc, etc.=20
>>=20
>>The very simple test is to take a VNA, a couple of sections of coax =
and=3D20=20
>>a DC block. Move the DC block between the transmit end, the junction =
of =3D=20
>>=20
>>the two cables, and the receiver and look at the behavior of that =
net=3D20=20
>>channel. With good coax and connectors the channel performance =
will=3D20=20
>>change almost immeasureably. Now go and add a coax T on one side of =
the =3D=20
>>=20
>>DC block. Move that whole thing around as a unit and again the =
channel=3D20=20
>>performance remains the same. Add a second coax T on the other side =
of=3D20=20
>>the DC block from the first, and again move the whole thing around. =
The =3D=20
>>=20
>>results will still remain uniform. Now if you go and move one of those =
=3D=20
>>=20
>>T's someplace else, then the pesky mole you're trying to whack moves =
and =3D=20
>>=20
>>the resonance will pop up somewhere else. The bottom line is that =
it's=3D20=20
>>resonance that we need to fight and resonance doesn't know left from =
=3D=20
>>right.=20
>>=20
>>Regards,=20
>>=20
>>=20
>>Steve.=20
>>Jory McKinley wrote:=20
>>=20
>>=20
>>>To add to this, I will ask for release of lab data that I took =
that=3D20=20
>>>shows RX_EYE clearly improves as the AC cap/term location is =
moved=3D20=20
>>>closer to the RX. The data indicates that even though overall channel =
=3D=20
>>>=20
>>>=20
>>=20
>>=20
>>=20
>>>loss may not be affected, the 50ps edge rates we are sending =
through=3D20=20
>>>the channel are affected (in terms of time domain ringing) by the =
AC=3D20=20
>>>cap/term placement. This kind of feels right.=20
>>>-Jory=20
>>>=3D20=20
>>>=20
>>>----- Original Message ----=20
>>>From: steve weir <weirsi@xxxxxxxxxx>=20
>>>To: Stephen Zinck <signalintegrity@xxxxxxxxxxx>=20
>>>Cc: Scott McMorrow <scott@xxxxxxxxxxxxx>; =
jory_mckinley@xxxxxxxxx;=3D20=20
>>>leeritchey@xxxxxxxxxxxxx; npatel@xxxxxxxxxx; si-list@xxxxxxxxxxxxx=20
>>>Sent: Tuesday, September 25, 2007 12:52:41 PM=20
>>>Subject: Re: [SI-LIST] Re: AC Coupled Signals=20
>>>=20
>>>Steve, as far as I know where we have agreement that capacitor =3D=20
>>>=20
>>>=20
>>location=20
>>=20
>>=20
>>>can only affect performance where the combined capacitor and mount=20
>>>presents a discontinuity and that discontinuity is located such that =
=3D=20
>>>=20
>>>=20
>>it=20
>>=20
>>=20
>>>forms a resonant structure with another discontinuity in the channel. =
=3D=20
>>>=20
>>>=20
>>I=20
>>=20
>>=20
>>>fail to see where we have moved any closer to supporting your premise =
>>>that locating a greater proportion of fixed loss before the capacitor =
>>>changes end to end loss than placing that same fixed loss behind it.=20
>>>=20
>>>As for lab measurements, we have these as we have characterized many=20
>>>links. We also have extensive simulations.=20
>>>=20
>>>Regards,=20
>>>=20
>>>=20
>>>Steve.=20
>>>=20
>>>Stephen Zinck wrote:=20
>>>=20
>>>=20
>>>>Hi Steve,=20
>>>>=20
>>>>I understand your point but I actually thought Scott and I were=20
>>>>getting close. I guess I still need him to explain his statement:=20
>>>>"The only time position matters is in the face of discontinuities."=20
>>>>because this runs counter to your assertion.=20
>>>>=20
>>>>It would be good to have some concrete lab measurement results to =
=3D=20
>>>>=20
>>>>=20
>>back=20
>>=20
>>=20
>>>>either of our points up. I am sorry I don't have any.=20
>>>>=20
>>>>We agree on TDR/VNA characteristics...=20
>>>>=20
>>>>Steve=20
>>>>=20
>>>>Stephen P. Zinck=20
>>>>Interconnect Engineering Inc.=20
>>>>P.O. Box 577=20
>>>>South Berwick, ME 03908=20
>>>>Phone - (207) 384-8280=20
>>>>Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
>>>>Web - www.interconnectengineering.com=3D20=20
>>>>=20
>>>>=20
>>><http://www.interconnectengineering.com>=20
>>>=20
>>>=20
>>>>----- Original Message ----- From: "steve weir" <weirsi@xxxxxxxxxx>=20
>>>>To: <signalintegrity@xxxxxxxxxxx>=20
>>>>Cc: "Scott McMorrow" <scott@xxxxxxxxxxxxx>; =3D=20
>>>>=20
>>>>=20
>><jory_mckinley@xxxxxxxxx>;=20
>>=20
>>=20
>>>><leeritchey@xxxxxxxxxxxxx>; <npatel@xxxxxxxxxx>; =3D=20
>>>>=20
>>>>=20
>><si-list@xxxxxxxxxxxxx>=20
>>=20
>>=20
>>>>Sent: Tuesday, September 25, 2007 12:24 PM=20
>>>>Subject: [SI-LIST] Re: AC Coupled Signals=20
>>>>=20
>>>>=20
>>>>=20
>>>>=20
>>>>>Stephen, OK so when you say "lossy" or "nonlinear" you mean=3D3D20=20
>>>>>discontinuous. Discontinuities aggravate resonances based on=20
>>>>>specific=3D3D20=20
>>>>>structure material and geometries, in other words the distance on =
=3D=20
>>>>>=20
>>>>>=20
>>a=3D3D20=20
>>=20
>>=20
>>>>>centimeter or millimeter scale between discontinuities. We =3D=20
>>>>>=20
>>>>>=20
>>have=3D3D20=20
>>=20
>>=20
>>>>>essentially the same opportunities for channel discontinuities at =
=3D=20
>>>>>=20
>>>>>=20
>>and=20
>>=20
>>=20
>>>>>in =3D3D=20
>>>>>=20
>>>>>the vicinity of the transmitter as the receiver. So I still do not=20
>>>>>see=3D3D20=20
>>>>>a defensible basis for the offered position: that placing a =3D=20
>>>>>=20
>>>>>=20
>>capacitor=20
>>=20
>>=20
>>>>>at =3D3D=20
>>>>>=20
>>>>>one end of the line versus the other changes the end to end loss. =
=3D20=20
>>>>>What=3D3D20=20
>>>>>matters is if wherever I place one discontinuity that it sets up a=20
>>>>>sharp =3D3D=20
>>>>>=20
>>>>>resonance with another discontinuity. That can happen equally well=20
>>>>>at=3D3D20=20
>>>>>either end of the line.=20
>>>>>=20
>>>>>If one looks at a channel with only a TDR I might understand =3D=20
>>>>>=20
>>>>>=20
>>the=3D3D20=20
>>=20
>>=20
>>>>>erroneous perception that placing a discontinuity down the line =3D =
>>>>>=20
>>>>>=20
>>is=3D3D20=20
>>=20
>>=20
>>>>>better than up front. But that is an illusion. TDR resolution=3D20=20
>>>>>=20
>>>>>=20
>>>falls=3D3D20=20
>>>=20
>>>=20
>>>>>with interconnect distance. This ia a result of the inherent =
loss=3D20=20
>>>>>=20
>>>>>=20
>>>of=3D3D20=20
>>>=20
>>>=20
>>>>>the interconnect that shelves bandwidth and hence resolution =3D=20
>>>>>=20
>>>>>=20
>>versus=3D3D20=20
>>=20
>>=20
>>>>>distance for the instrument. This is one of the big limitations of =
=3D=20
>>>>>=20
>>>>>=20
>>=20
>>=20
>>=20
>>>a=3D3D20=20
>>>=20
>>>=20
>>>>>TDR for channel evaluation. A through measurement with a TDT or =3D =
>>>>>=20
>>>>>=20
>>VNA=3D3D20=20
>>=20
>>=20
>>>>>does not suffer that limitation, give true measure of S21 and so=20
>>>>>report=3D3D20=20
>>>>>the real channel performance. Eric Bogatin spends some time on =3D=20
>>>>>=20
>>>>>=20
>>the=3D3D20=20
>>=20
>>=20
>>>>>issue of bandwidth versus interconnect length in his book.=20
>>>>>=20
>>>>>Regards,=20
>>>>>=20
>>>>>=20
>>>>>Steve.=20
>>>>>Stephen Zinck wrote:=20
>>>>>=20
>>>>>=20
>>>>>>Scott,=20
>>>>>>We may have some nomenclature issues here...=3D3D20=20
>>>>>>=20
>>>>>>When I say "lossy interface to the capacitor" I mean with =3D=20
>>>>>>=20
>>>>>>=20
>>impedance=20
>>=20
>>=20
>>>>>>dis=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>continuities. So I think we are on a similar page given your =3D=20
>>>>>=20
>>>>>=20
>>statement:=20
>>=20
>>=20
>>>>>>"The only time position matters is in the face of =3D=20
>>>>>>=20
>>>>>>=20
>>discontinuities."=20
>>=20
>>=20
>>>>>>Again, most often, my role is to simulate the customers system at=20
>>>>>>the 1=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>1th hour. I don't recommend this, I just work within the customer's =
>>>>>needs=3D3D=20
>>>>>/requirements. I make real world recommendations from simulation=20
>>>>>results =3D3D=20
>>>>>for designs where these discontinuities you mention are a fact of=20
>>>>>life. G=3D3D=20
>>>>>ranted my customers are not doing 5+ Gbit/s designs (right now ;-). =
>>>>>=20
>>>>>=20
>>>>>>Above these data-rates, all you mention, capacitor transition =3D=20
>>>>>>=20
>>>>>>=20
>>(pad,=20
>>=20
>>=20
>>>>>>via=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>s, etc) are of the utmost importance. And I would absolutely agree=20
>>>>>that t=3D3D=20
>>>>>he more perfect you make these transitions, the less it matters =3D =
>>>>>=20
>>>>>=20
>>where=20
>>=20
>>=20
>>>>>the=3D3D=20
>>>>>y are placed...=20
>>>>>=20
>>>>>=20
>>>>>>So I do believe AC coupling capacitor position does matter, as you =
>>>>>>stat=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>e, for the bulk of the designs occurring these days where component =
>>>>>footp=3D3D=20
>>>>>rint and via optimization, etc. is NOT occurring...=20
>>>>>=20
>>>>>=20
>>>>>>Steve=20
>>>>>>=20
>>>>>>Stephen P. Zinck=20
>>>>>>Interconnect Engineering Inc.=20
>>>>>>P.O. Box 577=20
>>>>>>South Berwick, ME 03908=20
>>>>>>Phone - (207) 384-8280=20
>>>>>>Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
>>>>>>Web - www.interconnectengineering.com=3D20=20
>>>>>>=20
>>>>>>=20
>>><http://www.interconnectengineering.com>=20
>>>=20
>>>=20
>>>>>> ----- Original Message -----=3D3D20=20
>>>>>> From: Scott McMorrow=3D3D20=20
>>>>>> To: Stephen Zinck=3D3D20=20
>>>>>> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;=20
>>>>>>npatel@micro=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>n.com ; si-list@xxxxxxxxxxxxx=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> Sent: Tuesday, September 25, 2007 11:08 AM=20
>>>>>> Subject: Re: [SI-LIST] Re: AC Coupled Signals=20
>>>>>>=20
>>>>>>=20
>>>>>> Steven,=20
>>>>>>=20
>>>>>> I would not agree with your following statements.=20
>>>>>>=20
>>>>>> "I agree in theory with all you state. Assuming a lossless=20
>>>>>>interface =3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>to the capacitor, it shouldn't matter where you place it, given a=20
>>>>>purely =3D3D=20
>>>>>linear system. But the real world is lossy, even when one makes =3D =
>>>>>=20
>>>>>=20
>>great=20
>>=20
>>=20
>>>>>3D =3D3D=20
>>>>>solved structures. Manufacturing and other tolerances tend to take=20
>>>>>the tr=3D3D=20
>>>>>ek towards perfection to task."=20
>>>>>=20
>>>>>=20
>>>>>> "Would either of you agree that AC coupling capacitor location =
=3D=20
>>>>>>=20
>>>>>>=20
>>may=20
>>=20
>>=20
>>>>>>ma=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>tter with a lossy interface to the capacitor?"=20
>>>>>=20
>>>>>=20
>>>>>> Insertion loss in a flat impedance linear lossy system will be=20
>>>>>>indepe=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>ndent of capacitor location. Run the math and see. The only time=20
>>>>>positi=3D3D=20
>>>>>on matters is in the face of discontinuities. In fact, given a =3D=20
>>>>>=20
>>>>>=20
>>low=20
>>=20
>>=20
>>>>>loss=3D3D=20
>>>>>interconnect with discontinuities and a high loss interconnect with =
>>>>>disc=3D3D=20
>>>>>ontinuities, the low loss system, with it's higher Q, will often =
=3D=20
>>>>>=20
>>>>>=20
>>have=20
>>=20
>>=20
>>>>>wor=3D3D=20
>>>>>se behavior.=20
>>>>>=20
>>>>>=20
>>>>>> An improperly designed 0402 capacitor transition for a 50 ohm =3D =
>>>>>>=20
>>>>>>=20
>>line=20
>>=20
>>=20
>>>>>>ca=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>n easily exhibit a discontinuity of 35 ohms for 50 ps. If attached=20
>>>>>to po=3D3D=20
>>>>>orly designed via transitions, the discontinuity will be even =3D=20
>>>>>=20
>>>>>=20
>>worse. =3D20=20
>>=20
>>=20
>>>>>Whe=3D3D=20
>>>>>n this is coupled closely to a high capacitance receiver input, a=20
>>>>>high ca=3D3D=20
>>>>>pacitance transmitter output, a low impedance via stub =3D=20
>>>>>=20
>>>>>=20
>>discontinuity,=20
>>=20
>>=20
>>>>>or =3D3D=20
>>>>>a low impedance connector discontinuity, it can form a 1/2 wave=20
>>>>>resonant =3D3D=20
>>>>>circuit. This is most likely the problem you are seeing. =3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> If the interconnect has essentially flat impedance, position =3D=20
>>>>>>=20
>>>>>>=20
>>does=20
>>=20
>>=20
>>>>>>not=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>matter. If the capacitor transition is properly designed, position=20
>>>>>does=3D3D=20
>>>>>not matter. All of the data we have on this is proprietary at this=20
>>>>>time=3D3D=20
>>>>>=3D3D2E Our understanding of the physics has been verified by full =
=3D=20
>>>>>=20
>>>>>=20
>>wave=20
>>=20
>>=20
>>>>>mode=3D3D=20
>>>>>ling, simulation and measurement.=20
>>>>>=20
>>>>>=20
>>>>>>=20
>>>>>> regards,=20
>>>>>>=20
>>>>>> Scott=20
>>>>>>=20
>>>>>>=20
>>>>>>=20
>>>>>>Scott McMorrow=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>>121 North River Drive=20
>>>>>>Narragansett, RI 02882=20
>>>>>>(401) 284-1827 Business=20
>>>>>>(401) 284-1840 Fax=20
>>>>>>=20
>>>>>>http://www.teraspeed.com=20
>>>>>>=20
>>>>>>Teraspeed=3D3DAE is the registered service mark of=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>>=20
>>>>>>=20
>>>>>> Stephen Zinck wrote:=3D3D20=20
>>>>>> Hi Scott and Steve,=20
>>>>>>=20
>>>>>> To answer both of your questions, it is the resulting Hspice=20
>>>>>>(with =3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>S-parameters) differential eye patterns, as viewed at the receiver=20
>>>>>die, t=3D3D=20
>>>>>hat were used to make a comparison of source versus destination AC=20
>>>>>coupli=3D3D=20
>>>>>ng capacitor locations. The system was excited with a string of =3D =
>>>>>=20
>>>>>=20
>>ones,=20
>>=20
>>=20
>>>>>fol=3D3D=20
>>>>>lowed by a single zero, followed by a string of ones.=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> I have not specifically designed a test board that varies the =3D =
>>>>>>=20
>>>>>>=20
>>AC=20
>>=20
>>=20
>>>>>>co=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>upling capacitor location along a trace.=20
>>>>>=20
>>>>>=20
>>>>>> I understand the "shades of gray" here and agree that one =3D=20
>>>>>>=20
>>>>>>=20
>>can't=20
>>=20
>>=20
>>>>>>mak=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>e a "rule of thumb" generalization in our line of work these =3D=20
>>>>>=20
>>>>>=20
>>days.=3D3D20=20
>>=20
>>=20
>>>>>> I agree in theory with all you state. Assuming a lossless=20
>>>>>>interface=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>to the capacitor, it shouldn't matter where you place it, given a=20
>>>>>purely=3D3D=20
>>>>>linear system. But the real world is lossy, even when one makes =3D =
>>>>>=20
>>>>>=20
>>great=20
>>=20
>>=20
>>>>>3D=3D3D=20
>>>>>solved structures. Manufacturing and other tolerances tend to take=20
>>>>>the t=3D3D=20
>>>>>rek towards perfection to task.=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> Do either of you have real world measured results, that you=20
>>>>>>could s=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>hare, that show no marked difference in received signal=20
>>>>>characteristics w=3D3D=20
>>>>>hen the AC coupling capacitor position is varied through a 30 inch=20
>>>>>backpl=3D3D=20
>>>>>ane system (or similar)?=20
>>>>>=20
>>>>>=20
>>>>>> I believe my experience with capacitor location may prove true=20
>>>>>>if t=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>he capacitor interface is lossy (which is the case). A lot of my=20
>>>>>customer=3D3D=20
>>>>>s are just looking for quick ways to maximize performance using=20
>>>>>standard =3D3D=20
>>>>>component packages and standard layout practices (in the end, I =3D =
>>>>>=20
>>>>>=20
>>don't=20
>>=20
>>=20
>>>>>lik=3D3D=20
>>>>>e to give anything away that is low lying fruit). Most of the time =
=3D=20
>>>>>=20
>>>>>=20
>>I=20
>>=20
>>=20
>>>>>am d=3D3D=20
>>>>>oing my analysis after the board is in layout, where I have limited =
>>>>>abili=3D3D=20
>>>>>ty to change the design (unless it is really broken). In a perfect=20
>>>>>world,=3D3D=20
>>>>>where I am involved early, the package optimization and layout=20
>>>>>structure=3D3D=20
>>>>>s can be optimized as you state, but only if the margins warrant it =
>>>>>(syst=3D3D=20
>>>>>em performance issues are expected after initial "what-if"=20
>>>>>simulations ha=3D3D=20
>>>>>ve occurred). The right tool for the right job rules the day...=20
>>>>>=20
>>>>>=20
>>>>>> Would either of you agree that AC coupling capacitor location=20
>>>>>>may m=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>atter with a lossy interface to the capacitor?=20
>>>>>=20
>>>>>=20
>>>>>> All the best,=20
>>>>>> Steve=20
>>>>>>=20
>>>>>> Stephen P. Zinck=20
>>>>>> Interconnect Engineering Inc.=20
>>>>>> P.O. Box 577=20
>>>>>> South Berwick, ME 03908=20
>>>>>> Phone - (207) 384-8280=20
>>>>>> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
>>>>>> Web - www.interconnectengineering.com=3D20=20
>>>>>>=20
>>>>>>=20
>>><http://www.interconnectengineering.com>=20
>>>=20
>>>=20
>>>>>> ----- Original Message -----=3D3D20=20
>>>>>> From: Scott McMorrow=3D3D20=20
>>>>>> To: Stephen Zinck=3D3D20=20
>>>>>> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;=20
>>>>>>npatel@m=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>icron.com ; si-list@xxxxxxxxxxxxx=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> Sent: Tuesday, September 25, 2007 9:44 AM=20
>>>>>> Subject: Re: [SI-LIST] Re: AC Coupled Signals=20
>>>>>>=20
>>>>>>=20
>>>>>> Stephen=20
>>>>>>=20
>>>>>> Define "better" and then relate your simulations and=20
>>>>>>conclusions =3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>to linear system theory and measurements. =3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> I contend that the only difference an AC coupling capacitor=20
>>>>>>can p=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>ossibly have due to position in a linear interconnect is a result =
=3D=20
>>>>>=20
>>>>>=20
>>of=20
>>=20
>>=20
>>>>>impe=3D3D=20
>>>>>dance mismatch. I contend that the capacitor will form a 1/2 wave=20
>>>>>resona=3D3D=20
>>>>>nt circuit with other interconnect discontinuities (connectors, =3D =
>>>>>=20
>>>>>=20
>>vias=20
>>=20
>>=20
>>>>>stub=3D3D=20
>>>>>s, packages, Tx die, Rx die ... etc) and that this interaction is=20
>>>>>system,=3D3D=20
>>>>>chip, connector and package design dependent. I contend that it is=20
>>>>>this=3D3D=20
>>>>>1/2 resonance that can cause differences that can be measured, but=20
>>>>>that =3D3D=20
>>>>>there is no "rule of thumb", since the position and magnitude of=20
>>>>>disconti=3D3D=20
>>>>>nuities are different in every system. In some systems the =3D=20
>>>>>=20
>>>>>=20
>>receiver=20
>>=20
>>=20
>>>>>cons=3D3D=20
>>>>>titutes a larger discontinuity than the transmitter. In other=20
>>>>>systems th=3D3D=20
>>>>>is is reversed. In yet other systems, connectors and vias =3D=20
>>>>>=20
>>>>>=20
>>represent=20
>>=20
>>=20
>>>>>larg=3D3D=20
>>>>>er discontinuites than do either the transmitters or receivers. It=20
>>>>>all "j=3D3D=20
>>>>>ust depends". To state a specific rule is just plain incorrect.=20
>>>>>=20
>>>>>=20
>>>>>> I contend that once you remove the magic and myths =3D=20
>>>>>>=20
>>>>>>=20
>>surrounding=20
>>=20
>>=20
>>>>>>AC=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>coupling capacitors, analysis of the 3D structure shows that by=20
>>>>>reducing=3D3D=20
>>>>>the signal path discontinuity through the capacitor, you will=20
>>>>>necessaril=3D3D=20
>>>>>y improve performance. An AC coupling capacitor, with it's=20
>>>>>associated vi=3D3D=20
>>>>>a and pad transition design, can be viewed as a black box which has =
>>>>>inser=3D3D=20
>>>>>tion loss and return loss, and can be modeled quite well using =3D=20
>>>>>=20
>>>>>=20
>>either=20
>>=20
>>=20
>>>>>lum=3D3D=20
>>>>>ped element approximations or (my favorite) S-parameters. As such =
=3D=20
>>>>>=20
>>>>>=20
>>it=20
>>=20
>>=20
>>>>>wil=3D3D=20
>>>>>l cascade in a simulation model just like any other linear element. =
=3D=20
>>>>>=20
>>>>>=20
>>=3D20=20
>>=20
>>=20
>>>>>If w=3D3D=20
>>>>>e start with a system with flat 50 ohm impedance from end to end, =
=3D=20
>>>>>=20
>>>>>=20
>>it=20
>>=20
>>=20
>>>>>can =3D3D=20
>>>>>be easily shown that no matter what the position of the capacitor=20
>>>>>along t=3D3D=20
>>>>>he interconnect is, the insertion loss of the system is identical. =
=3D=20
>>>>>=20
>>>>>=20
>>=20
>>=20
>>=20
>>>>>It is=3D3D=20
>>>>>only the return loss, as seen from each end that changes.=20
>>>>>=20
>>>>>=20
>>>>>> I've been designing AC coupling capacitor mounting =3D=20
>>>>>>=20
>>>>>>=20
>>transitions=20
>>=20
>>=20
>>>>>>pr=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>operly for quite a few years now and have some 0402 designs that =
=3D=20
>>>>>=20
>>>>>=20
>>keep=20
>>=20
>>=20
>>>>>S12=3D3D=20
>>>>>above -0.2 dB up to 7.5 GHz, S12 below -20 dB @ 5 GHz, and below =
=3D=20
>>>>>=20
>>>>>=20
>>-15=20
>>=20
>>=20
>>>>>dB =3D3D=20
>>>>>@ 10 GHz. For all practical purposes, these designs are =3D=20
>>>>>=20
>>>>>=20
>>transparent=20
>>=20
>>=20
>>>>>and =3D3D=20
>>>>>may be placed anywhere in an interconnect design where there is=20
>>>>>space, si=3D3D=20
>>>>>nce there is little resonance interaction with other devices and=20
>>>>>structur=3D3D=20
>>>>>es.=20
>>>>>=20
>>>>>=20
>>>>>> Scott=20
>>>>>>=20
>>>>>>=20
>>>>>>Scott McMorrow=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>>121 North River Drive=20
>>>>>>Narragansett, RI 02882=20
>>>>>>(401) 284-1827 Business=20
>>>>>>(401) 284-1840 Fax=20
>>>>>>=20
>>>>>>http://www.teraspeed.com=20
>>>>>>=20
>>>>>>Teraspeed=3D3DAE is the registered service mark of=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>> =3D3D20=20
>>>>>>=20
>>>>>> Stephen Zinck wrote:=3D3D20=20
>>>>>> Hi Scott,=20
>>>>>>=20
>>>>>> My simulations show that the capacitor is best placed at =3D=20
>>>>>>=20
>>>>>>=20
>>the=20
>>=20
>>=20
>>>>>>re=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>ceiver end of the transmission-line. Do you disagree? If so, why?=20
>>>>>=20
>>>>>=20
>>>>>> Steve=20
>>>>>>=20
>>>>>> Stephen P. Zinck=20
>>>>>> Interconnect Engineering Inc.=20
>>>>>> P.O. Box 577=20
>>>>>> South Berwick, ME 03908=20
>>>>>> Phone - (207) 384-8280=20
>>>>>> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
>>>>>> Web - www.interconnectengineering.com=3D20=20
>>>>>>=20
>>>>>>=20
>>><http://www.interconnectengineering.com>=20
>>>=20
>>>=20
>>>>>> ----- Original Message -----=3D3D20=20
>>>>>> From: Scott McMorrow=3D3D20=20
>>>>>> To: signalintegrity@xxxxxxxxxxx=3D3D20=20
>>>>>> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;=20
>>>>>>npat=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>el@xxxxxxxxxx ; si-list@xxxxxxxxxxxxx=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>> Sent: Tuesday, September 25, 2007 8:30 AM=20
>>>>>> Subject: Re: [SI-LIST] Re: AC Coupled Signals=20
>>>>>>=20
>>>>>>=20
>>>>>> Stephen,=20
>>>>>>=20
>>>>>> I'm sorry, this is a linear system. Except for possible=20
>>>>>>reso=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>nances that are created by discontinuities and modal conversion=20
>>>>>(which ha=3D3D=20
>>>>>ve absolutely zero to do with signal rise time), there is no=20
>>>>>difference i=3D3D=20
>>>>>n the attenuation of a capacitor placed at the Tx as opposed at =3D =
>>>>>=20
>>>>>=20
>>the=20
>>=20
>>=20
>>>>>Rx. =3D3D=20
>>>>>W.R.T. the receiver, if it is "lost in the rise-time degradation of =
>>>>>the =3D3D=20
>>>>>system", it will be lost wherever it is placed.=20
>>>>>=20
>>>>>=20
>>>>>>=20
>>>>>>Scott McMorrow=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>>121 North River Drive=20
>>>>>>Narragansett, RI 02882=20
>>>>>>(401) 284-1827 Business=20
>>>>>>(401) 284-1840 Fax=20
>>>>>>=20
>>>>>>http://www.teraspeed.com=20
>>>>>>=20
>>>>>>Teraspeed=3D3DAE is the registered service mark of=20
>>>>>>Teraspeed Consulting Group LLC=20
>>>>>> =3D3D20=20
>>>>>>=20
>>>>>> Stephen Zinck wrote:=3D3D20=20
>>>>>>Hi Jory,=20
>>>>>>=20
>>>>>>I have simulated this at length and concur with your experience =
=3D=20
>>>>>>=20
>>>>>>=20
>>that=20
>>=20
>>=20
>>>>>>th=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>e=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>capacitor is best placed at the receiver...=20
>>>>>>=20
>>>>>>In effect, the attenuation associated with the capacitor placement =
>>>>>>at t=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>he=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>receiver (parasitics/pads/vias) is lost in the rise-time =3D=20
>>>>>>=20
>>>>>>=20
>>degradation=20
>>=20
>>=20
>>>>>>of=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>the=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>system.=20
>>>>>>The classic "don't break it until you have to" rule is =3D=20
>>>>>>=20
>>>>>>=20
>>applicable...=20
>>=20
>>=20
>>>>>>OK=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>this=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>is my rule... :-)=20
>>>>>>=20
>>>>>>All the best,=20
>>>>>>Steve=20
>>>>>>=20
>>>>>>Stephen P. Zinck=20
>>>>>>Interconnect Engineering Inc.=20
>>>>>>P.O. Box 577=20
>>>>>>South Berwick, ME 03908=20
>>>>>>Phone - (207) 384-8280=20
>>>>>>Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx=20
>>>>>>Web - www.interconnectengineering.com=3D20=20
>>>>>>=20
>>>>>>=20
>>><http://www.interconnectengineering.com>=20
>>>=20
>>>=20
>>>>>>----- Original Message -----=3D3D20=20
>>>>>>From: "Jory McKinley" <jory_mckinley@xxxxxxxxx>=20
>>>>>>To: <leeritchey@xxxxxxxxxxxxx>; <npatel@xxxxxxxxxx>;=20
>>>>>><si-list@freelists=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>=3D3D2Eorg>=20
>>>>>=20
>>>>>=20
>>>>>>Sent: Monday, September 24, 2007 5:31 PM=20
>>>>>>Subject: [SI-LIST] Re: AC Coupled Signals=20
>>>>>>=20
>>>>>>=20
>>>>>> I will elaborate a bit on what I have seen. I have measured =3D=20
>>>>>>=20
>>>>>>=20
>>(time=20
>>=20
>>=20
>>>>>>dom=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>ain)=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>in the lab some effects that appears to be location specific in =
=3D=20
>>>>>>=20
>>>>>>=20
>>the=3D3D20=20
>>=20
>>=20
>>>>>>placement of the AC coupling caps at the rcvr. Now this may be =3D =
>>>>>>=20
>>>>>>=20
>>due=20
>>=20
>>=20
>>>>>>in =3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>part=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>to the fact that I am using 50-ohm resistor termination in each =
=3D=20
>>>>>>=20
>>>>>>=20
>>lead=20
>>=20
>>=20
>>>>>>as=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>well and the combination (cap plus rcvr reflection) is giving =3D=20
>>>>>>=20
>>>>>>=20
>>some=3D3D20=20
>>=20
>>=20
>>>>>>imbalance depending on distance. The best rcvr eye that I am =3D=20
>>>>>>=20
>>>>>>=20
>>seeing=20
>>=20
>>=20
>>>>>>is=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>when I can move the AC/term as close to the rcvr as I can. By the=20
>>>>>>way =3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>>these are 5Gb/s signals.=20
>>>>>>If I have time I will try and isolate what I am seeing and even=20
>>>>>>simulat=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>e=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>it, has anyone else seen or simulated this?=20
>>>>>>-Jory=20
>>>>>>=20
>>>>>>----- Original Message ----=20
>>>>>>From: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>=20
>>>>>>To: "npatel@xxxxxxxxxx" <npatel@xxxxxxxxxx>; si-list@xxxxxxxxxxxxx =
>>>>>>Sent: Monday, September 24, 2007 1:06:06 PM=20
>>>>>>Subject: [SI-LIST] Re: AC Coupled Signals=20
>>>>>>=20
>>>>>>Nikil,=20
>>>>>>=20
>>>>>>I have made measurements on test PCBs and the location is not all =
=3D=20
>>>>>>=20
>>>>>>=20
>>that=20
>>=20
>>=20
>>>>>>important. In identical pairs, one with AC coupling capacitors =3D =
>>>>>>=20
>>>>>>=20
>>and=20
>>=20
>>=20
>>>>>>the=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>>other without, the loss vs. frequency is virtually identical at =
=3D=20
>>>>>>=20
>>>>>>=20
>>leas=20
>>=20
>>=20
>>>>>>ou=3D3D=20
>>>>>>=20
>>>>>>=20
>>>>>t=3D3D20=20
>>>>>=20
>>>>>=20
>>>>>>to=20
>>>>>>6 GHz. That would be 12 Mb/S.=20
>>>>>>=20
>>>>>>Lee Ritchey=20
>>>>>>=20
>>>>>>=20
>>>>>> [Original Message]=20
>>>>>>From: <npatel@xxxxxxxxxx>=20
>>>>>>To: <si-list@xxxxxxxxxxxxx>=20
>>>>>>Date: 9/24/2007 10:21:37 AM=20
>>>>>>Subject: [SI-LIST] AC Coupled Signals=20
>>>>>>=20
>>>>>>Hi all,=20
>>>>>>In case of AC coupled signals does anyone know of an optimum =3D=20
>>>>>>=20
>>>>>>=20
>>placement=20
>>=20
>>=20
>>>>>>for the caps? I mean should they be placed near the source, =3D=20
>>>>>>=20
>>>>>>=20
>>receiver,=20
>>=20
>>=20
>>>>>>middle of the transmission line?=20
>>>>>>How much difference does it make in the opening of the eye?=20
>>>>>>The signals are differential CML running at 3.0Gbps=20
>>>>>>=20
>>>>>>Thanks,=20
>>>>>>Nikhil=20
>>>>>>=20
>>>>>>=20
>>>>>>=20
>>>>>>=20
>>=20
>>=20
>>------------------------------------------------------------------=20
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>>=20
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>>=20
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>>=20
>=20
> --=20
> Ronald Miller=20
> Ghz Data, Signal Integrity Consulting=20
> 7721 Sunset Ave.=20
> Newark CA 94560=20
> tel 510-793-4744=20
> cell 510-377-9380=20
> fax 510-742-6686=20
> www.ghzdata.com=20
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