[SI-LIST] Re: AC Coupled Signals
- From: "Loyer, Jeff" <jeff.loyer@xxxxxxxxx>
- To: <weirsi@xxxxxxxxxx>, <signalintegrity@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Tue, 25 Sep 2007 13:06:40 -0700
Could the difference be Stephen's package models and/or driver/receiver
termination? If he had a worse transmitter package/termination than
receiver, could that explain the improved results when the cap was close
to the receiver?
I've agreed with all Steve and Scott have said (and really enjoyed the
points they've brought up), but also don't doubt that, in some
particular instances, capacitor placement closer to the receiver might
give better results than close to the driver (and vice-versa).
My opinion regarding the general question is that there aren't any
one-size-fits-all rules either way (cap placement), that simulations
must be performed for each particular topology.
I've found this to be especially true for more complex topologies, with
connectors, etc. For instance, putting discontinuities at approximately
the same distance apart as some other set of discontinuities in the same
channel has caused the resonances to add up, and close the eyes.
There's also the question of whether it's best to "lump" discontinuities
together (maybe put the cap close to a connector), rather than
"distribute" them. (terms in this context having nothing to do with the
standard SI meaning of the words)
Of course, if the discontinuity caused by the cap can be reduced, that's
strongly preferred.
I would also wonder if, for most point-to-point topologies, it really
matters. Most links are designed to accommodate multiple connectors and
(usually) corresponding longer lengths. The point-to-point topos are
often no-brainers (compared to those).
For the topos with connectors and/or longer lengths, I'd hesitate to
follow rules-of-thumb. Simulations would be in order. That might
include following design guidelines that are based on simulations.
And, as Jon pointed out, sometimes you don't have any choice -
specifications dictate parts placement.
Disclaimer:
The content of this message is my personal opinion only and although I
am an employee of Intel, the statements I make here in no way represent
Intel's position on the issue, nor am I authorized to speak on behalf of
Intel on this matter.
Jeff Loyer
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of steve weir
Sent: Tuesday, September 25, 2007 9:25 AM
To: signalintegrity@xxxxxxxxxxx
Cc: Scott McMorrow; jory_mckinley@xxxxxxxxx; leeritchey@xxxxxxxxxxxxx;
npatel@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: AC Coupled Signals
Stephen, OK so when you say "lossy" or "nonlinear" you mean=20
discontinuous. Discontinuities aggravate resonances based on
specific=20
structure material and geometries, in other words the distance on a=20
centimeter or millimeter scale between discontinuities. We have=20
essentially the same opportunities for channel discontinuities at and in
=
the vicinity of the transmitter as the receiver. So I still do not
see=20
a defensible basis for the offered position: that placing a capacitor at
=
one end of the line versus the other changes the end to end loss.
What=20
matters is if wherever I place one discontinuity that it sets up a sharp
=
resonance with another discontinuity. That can happen equally well
at=20
either end of the line.
If one looks at a channel with only a TDR I might understand the=20
erroneous perception that placing a discontinuity down the line is=20
better than up front. But that is an illusion. TDR resolution falls=20
with interconnect distance. This ia a result of the inherent loss of=20
the interconnect that shelves bandwidth and hence resolution versus=20
distance for the instrument. This is one of the big limitations of a=20
TDR for channel evaluation. A through measurement with a TDT or VNA=20
does not suffer that limitation, give true measure of S21 and so
report=20
the real channel performance. Eric Bogatin spends some time on the=20
issue of bandwidth versus interconnect length in his book.
Regards,
Steve.
Stephen Zinck wrote:
> Scott,
> We may have some nomenclature issues here...=20
>
> When I say "lossy interface to the capacitor" I mean with impedance
dis=
continuities. So I think we are on a similar page given your statement:
>
> "The only time position matters is in the face of discontinuities."
>
> Again, most often, my role is to simulate the customers system at the
1=
1th hour. I don't recommend this, I just work within the customer's
needs=
/requirements. I make real world recommendations from simulation results
=
for designs where these discontinuities you mention are a fact of life.
G=
ranted my customers are not doing 5+ Gbit/s designs (right now ;-).
>
> Above these data-rates, all you mention, capacitor transition (pad,
via=
s, etc) are of the utmost importance. And I would absolutely agree that
t=
he more perfect you make these transitions, the less it matters where
the=
y are placed...
>
> So I do believe AC coupling capacitor position does matter, as you
stat=
e, for the bulk of the designs occurring these days where component
footp=
rint and via optimization, etc. is NOT occurring...
>
> Steve
>
> Stephen P. Zinck
> Interconnect Engineering Inc.
> P.O. Box 577
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
>
> ----- Original Message -----=20
> From: Scott McMorrow=20
> To: Stephen Zinck=20
> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;
npatel@micro=
n.com ; si-list@xxxxxxxxxxxxx=20
> Sent: Tuesday, September 25, 2007 11:08 AM
> Subject: Re: [SI-LIST] Re: AC Coupled Signals
>
>
> Steven,
>
> I would not agree with your following statements.
>
> "I agree in theory with all you state. Assuming a lossless interface
=
to the capacitor, it shouldn't matter where you place it, given a purely
=
linear system. But the real world is lossy, even when one makes great 3D
=
solved structures. Manufacturing and other tolerances tend to take the
tr=
ek towards perfection to task."
>
> "Would either of you agree that AC coupling capacitor location may
ma=
tter with a lossy interface to the capacitor?"
>
>
> Insertion loss in a flat impedance linear lossy system will be
indepe=
ndent of capacitor location. Run the math and see. The only time
positi=
on matters is in the face of discontinuities. In fact, given a low
loss=
interconnect with discontinuities and a high loss interconnect with
disc=
ontinuities, the low loss system, with it's higher Q, will often have
wor=
se behavior.
>
> An improperly designed 0402 capacitor transition for a 50 ohm line
ca=
n easily exhibit a discontinuity of 35 ohms for 50 ps. If attached to
po=
orly designed via transitions, the discontinuity will be even worse.
Whe=
n this is coupled closely to a high capacitance receiver input, a high
ca=
pacitance transmitter output, a low impedance via stub discontinuity, or
=
a low impedance connector discontinuity, it can form a 1/2 wave resonant
=
circuit. This is most likely the problem you are seeing. =20
>
> If the interconnect has essentially flat impedance, position does
not=
matter. If the capacitor transition is properly designed, position
does=
not matter. All of the data we have on this is proprietary at this
time=
=2E Our understanding of the physics has been verified by full wave
mode=
ling, simulation and measurement.
>
>
>
> regards,
>
> Scott
>
>
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> (401) 284-1827 Business
> (401) 284-1840 Fax
>
> http://www.teraspeed.com
>
> Teraspeed=AE is the registered service mark of
> Teraspeed Consulting Group LLC
>
>
> Stephen Zinck wrote:=20
> Hi Scott and Steve,
>
> To answer both of your questions, it is the resulting Hspice (with
=
S-parameters) differential eye patterns, as viewed at the receiver die,
t=
hat were used to make a comparison of source versus destination AC
coupli=
ng capacitor locations. The system was excited with a string of ones,
fol=
lowed by a single zero, followed by a string of ones.=20
>
> I have not specifically designed a test board that varies the AC
co=
upling capacitor location along a trace.
>
> I understand the "shades of gray" here and agree that one can't
mak=
e a "rule of thumb" generalization in our line of work these days.=20
>
> I agree in theory with all you state. Assuming a lossless
interface=
to the capacitor, it shouldn't matter where you place it, given a
purely=
linear system. But the real world is lossy, even when one makes great
3D=
solved structures. Manufacturing and other tolerances tend to take the
t=
rek towards perfection to task.=20
>
> Do either of you have real world measured results, that you could
s=
hare, that show no marked difference in received signal characteristics
w=
hen the AC coupling capacitor position is varied through a 30 inch
backpl=
ane system (or similar)?
>
> I believe my experience with capacitor location may prove true if
t=
he capacitor interface is lossy (which is the case). A lot of my
customer=
s are just looking for quick ways to maximize performance using standard
=
component packages and standard layout practices (in the end, I don't
lik=
e to give anything away that is low lying fruit). Most of the time I am
d=
oing my analysis after the board is in layout, where I have limited
abili=
ty to change the design (unless it is really broken). In a perfect
world,=
where I am involved early, the package optimization and layout
structure=
s can be optimized as you state, but only if the margins warrant it
(syst=
em performance issues are expected after initial "what-if" simulations
ha=
ve occurred). The right tool for the right job rules the day...
>
> Would either of you agree that AC coupling capacitor location may
m=
atter with a lossy interface to the capacitor?
>
> All the best,
> Steve
>
> Stephen P. Zinck
> Interconnect Engineering Inc.
> P.O. Box 577
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
>
> ----- Original Message -----=20
> From: Scott McMorrow=20
> To: Stephen Zinck=20
> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;
npatel@m=
icron.com ; si-list@xxxxxxxxxxxxx=20
> Sent: Tuesday, September 25, 2007 9:44 AM
> Subject: Re: [SI-LIST] Re: AC Coupled Signals
>
>
> Stephen
>
> Define "better" and then relate your simulations and conclusions
=
to linear system theory and measurements. =20
>
> I contend that the only difference an AC coupling capacitor can
p=
ossibly have due to position in a linear interconnect is a result of
impe=
dance mismatch. I contend that the capacitor will form a 1/2 wave
resona=
nt circuit with other interconnect discontinuities (connectors, vias
stub=
s, packages, Tx die, Rx die ... etc) and that this interaction is
system,=
chip, connector and package design dependent. I contend that it is
this=
1/2 resonance that can cause differences that can be measured, but that
=
there is no "rule of thumb", since the position and magnitude of
disconti=
nuities are different in every system. In some systems the receiver
cons=
titutes a larger discontinuity than the transmitter. In other systems
th=
is is reversed. In yet other systems, connectors and vias represent
larg=
er discontinuites than do either the transmitters or receivers. It all
"j=
ust depends". To state a specific rule is just plain incorrect.
>
> I contend that once you remove the magic and myths surrounding
AC=
coupling capacitors, analysis of the 3D structure shows that by
reducing=
the signal path discontinuity through the capacitor, you will
necessaril=
y improve performance. An AC coupling capacitor, with it's associated
vi=
a and pad transition design, can be viewed as a black box which has
inser=
tion loss and return loss, and can be modeled quite well using either
lum=
ped element approximations or (my favorite) S-parameters. As such it
wil=
l cascade in a simulation model just like any other linear element. If
w=
e start with a system with flat 50 ohm impedance from end to end, it can
=
be easily shown that no matter what the position of the capacitor along
t=
he interconnect is, the insertion loss of the system is identical. It
is=
only the return loss, as seen from each end that changes.
>
> I've been designing AC coupling capacitor mounting transitions
pr=
operly for quite a few years now and have some 0402 designs that keep
S12=
above -0.2 dB up to 7.5 GHz, S12 below -20 dB @ 5 GHz, and below -15 dB
=
@ 10 GHz. For all practical purposes, these designs are transparent and
=
may be placed anywhere in an interconnect design where there is space,
si=
nce there is little resonance interaction with other devices and
structur=
es.
>
>
> Scott
>
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> (401) 284-1827 Business
> (401) 284-1840 Fax
>
> http://www.teraspeed.com
>
> Teraspeed=AE is the registered service mark of
> Teraspeed Consulting Group LLC
> =20
>
> Stephen Zinck wrote:=20
> Hi Scott,
>
> My simulations show that the capacitor is best placed at the
re=
ceiver end of the transmission-line. Do you disagree? If so, why?
>
> Steve
>
> Stephen P. Zinck
> Interconnect Engineering Inc.
> P.O. Box 577
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
>
> ----- Original Message -----=20
> From: Scott McMorrow=20
> To: signalintegrity@xxxxxxxxxxx=20
> Cc: jory_mckinley@xxxxxxxxx ; leeritchey@xxxxxxxxxxxxx ;
npat=
el@xxxxxxxxxx ; si-list@xxxxxxxxxxxxx=20
> Sent: Tuesday, September 25, 2007 8:30 AM
> Subject: Re: [SI-LIST] Re: AC Coupled Signals
>
>
> Stephen,
>
> I'm sorry, this is a linear system. Except for possible
reso=
nances that are created by discontinuities and modal conversion (which
ha=
ve absolutely zero to do with signal rise time), there is no difference
i=
n the attenuation of a capacitor placed at the Tx as opposed at the Rx.
=
W.R.T. the receiver, if it is "lost in the rise-time degradation of the
=
system", it will be lost wherever it is placed.
>
>
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> (401) 284-1827 Business
> (401) 284-1840 Fax
>
> http://www.teraspeed.com
>
> Teraspeed=AE is the registered service mark of
> Teraspeed Consulting Group LLC
> =20
>
> Stephen Zinck wrote:=20
> Hi Jory,
>
> I have simulated this at length and concur with your experience that
th=
e=20
> capacitor is best placed at the receiver...
>
> In effect, the attenuation associated with the capacitor placement at
t=
he=20
> receiver (parasitics/pads/vias) is lost in the rise-time degradation
of=
the=20
> system.
> The classic "don't break it until you have to" rule is applicable...
OK=
this=20
> is my rule... :-)
>
> All the best,
> Steve
>
> Stephen P. Zinck
> Interconnect Engineering Inc.
> P.O. Box 577
> South Berwick, ME 03908
> Phone - (207) 384-8280
> Email - szinck@xxxxxxxxxxxxxxxxxxxxxxxxxxx
> Web - www.interconnectengineering.com
>
> ----- Original Message -----=20
> From: "Jory McKinley" <jory_mckinley@xxxxxxxxx>
> To: <leeritchey@xxxxxxxxxxxxx>; <npatel@xxxxxxxxxx>;
<si-list@freelists=
=2Eorg>
> Sent: Monday, September 24, 2007 5:31 PM
> Subject: [SI-LIST] Re: AC Coupled Signals
>
>
> I will elaborate a bit on what I have seen. I have measured (time
dom=
ain)=20
> in the lab some effects that appears to be location specific in the=20
> placement of the AC coupling caps at the rcvr. Now this may be due in
=
part=20
> to the fact that I am using 50-ohm resistor termination in each lead
as=
=20
> well and the combination (cap plus rcvr reflection) is giving some=20
> imbalance depending on distance. The best rcvr eye that I am seeing
is=
=20
> when I can move the AC/term as close to the rcvr as I can. By the way
=
> these are 5Gb/s signals.
> If I have time I will try and isolate what I am seeing and even
simulat=
e=20
> it, has anyone else seen or simulated this?
> -Jory
>
> ----- Original Message ----
> From: Lee Ritchey <leeritchey@xxxxxxxxxxxxx>
> To: "npatel@xxxxxxxxxx" <npatel@xxxxxxxxxx>; si-list@xxxxxxxxxxxxx
> Sent: Monday, September 24, 2007 1:06:06 PM
> Subject: [SI-LIST] Re: AC Coupled Signals
>
> Nikil,
>
> I have made measurements on test PCBs and the location is not all that
> important. In identical pairs, one with AC coupling capacitors and
the=
> other without, the loss vs. frequency is virtually identical at leas
ou=
t=20
> to
> 6 GHz. That would be 12 Mb/S.
>
> Lee Ritchey
>
>
> [Original Message]
> From: <npatel@xxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 9/24/2007 10:21:37 AM
> Subject: [SI-LIST] AC Coupled Signals
>
> Hi all,
> In case of AC coupled signals does anyone know of an optimum placement
> for the caps? I mean should they be placed near the source, receiver,
> middle of the transmission line?
> How much difference does it make in the opening of the eye?
> The signals are differential CML running at 3.0Gbps
>
> Thanks,
> Nikhil
>
>
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> Moody friends. Drama queens. Your life? Nope! - their life, your
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--=20
Steve Weir
Teraspeed Consulting Group LLC=20
121 North River Drive=20
Narragansett, RI 02882=20
California office
(408) 884-3985 Business
(707) 780-1951 Fax
Main office
(401) 284-1827 Business=20
(401) 284-1840 Fax=20
Oregon office
(503) 430-1065 Business
(503) 430-1285 Fax
http://www.teraspeed.com
This e-mail contains proprietary and confidential intellectual property
o=
f Teraspeed Consulting Group LLC
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Teraspeed(R) is the registered service mark of Teraspeed Consulting
Group=
LLC
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