[SI-LIST] A New Open Source SI Analysis Tool

Hi All,

I've been developing a new Open Source (GPLed) SI Analysis tool. 
Eventually I would like it to be able to accurately simulate 
"medium-speed" PCB level SI with topologies composed of simple passive 
termination and t-lines between IBIS defined devices. I'm currently 
soliciting help, bug-reports, suggestions, and comments from interested 
folks and thought that this would would be a good place to look.

Maybe someday it will have a fancy GUI, Windows installer, etc. but for 
now it is a source code only distribution that runs on Linux, or on 
Windows using cygwin. It's a Python module so requires a Python 
Interpreter (uses Python instead of a spice-like scripting language). 
It's currently an alpha release with very basic functionality.

If you're interested you can find it here:
http://www.thedigitalmachine.net/eispice.html

Please don't respond to this email on this list for help setting up / 
running the tool. I would like to avoid annoying subscribers to this 
list that aren't interested. I've setup a dedicated mailing list that 
you can join from the webpage above for discussion related to this tool.

Thanks!
Charles


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