[SI-LIST] Re: 90 degree turn in PCB tracks

  • From: "Tom Dagostino" <tom@xxxxxxxxxxxxx>
  • To: <leeritchey@xxxxxxxxxxxxx>, "'Scott McMorrow'" <scott@xxxxxxxxxxxxx>
  • Date: Tue, 25 Jul 2006 15:48:50 -0700

Lee, I've constructed test boards to measure the effect of non-mitered =
90
degree bends and they are very visible with 50 Ohm traces on boards =
0.062
thick with 0.110 wide traces.

Tom Dagostino
Teraspeed(R) Labs
13610 SW Harness Lane
Beaverton, OR 97008
503-430-1065
tom@xxxxxxxxxxxxx=20
www.teraspeed.com=20

Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
401-284-1827

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] =
On
Behalf Of Lee Ritchey
Sent: Tuesday, July 25, 2006 1:04 PM
To: Scott McMorrow; scott@xxxxxxxxxxxxx
Cc: Matthias Bergmann; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: 90 degree turn in PCB tracks


Way back in the dark ages when we used ECL to do high speed designs, I
contacted the author of the book to see why we couldn't duplicate his
measurements with an identical setup.  The response was that the picture =
was
wrong, but technical publications was in a hurry to go to press, so they
left it in!


> [Original Message]
> From: Scott McMorrow <scott@xxxxxxxxxxxxx>
> To: <scott@xxxxxxxxxxxxx>
> Cc: <leeritchey@xxxxxxxxxxxxx>; Matthias Bergmann
<MBergmann@xxxxxxxxxxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> Date: 7/25/2006 12:14:18 PM
> Subject: [SI-LIST] Re: 90 degree turn in PCB tracks
>
> Y'all,
> I just went and pulled up the old app. note. you can find it here=20
> http://www.onsemi.com/pub/Collateral/HB205-D.PDF
>
> I think the problem people have had is in not putting the old Motorola
> measurements in perspective.  Clearly if you read the previous pages=20
> you'll find that on pages 140 to 142 the design being tested is that =
of=20
> a microwave hybrid divider on a substrate that was 62 mils thick and =
had=20
> an Er of 5.3 (Er(eff)=3D 4.5 for microstrip).  A hybrid divider takes =
a 50=20
> ohm trace and divides it into two 100 ohm traces.  If you do the=20
> calculations, that 50 ohm trace was somewhere around 110 mils wide.
>
> As we go on to page 144, we find the famous corner tests, where=20
> clearly
> there are corner discontinuities shown by the TDR.  If I were a =
betting=20
> man, even though the material thickness and trace widths were not =
shown,=20
> I'd bet that they are similar to the previous hybrid divider.  So, we=20
> have a case where there is a really fat trace and therefore a big=20
> discontinuity.  If we do the math, as I did previously, that=20
> discontinuity should be:
>
> t(discontinuity) =3D 85 x sqrt(2 x 4.5) x .11 =3D 28 ps.
>
> In a TDR this time will be doubled, due to the round trip across the
> corner, so we would expect a hump with a duration of approximately 50 =
to=20
> 60 ps.  Even though the plots do not show a scale, I'd guess that =
around=20
> a 50 to 60 ps pulse duration would be about right, when you add  in =
the=20
> additional TDR rise time, itself.
>
> My conclusion is that there is nothing wrong with the old Motorola=20
> application note.   In fact, if you were to replicate this experiment=20
> with 100 mil lines on a thick FR4 substrate today, you'd get pretty=20
> much
> the same result.  The problem is that people have generalized the data =

> to cases with smaller line widths without scaling.  If you scale the=20
> Motorola measurements by 1/22  (5 mils/110 mils), those corner=20
> discontinuity impedance bumps will just blend into the noise.  They=20
> still exist ... but they are really, really tiny ... and not important =

> for modern digital board design ... just as Lee advocates.
>
>
>
> regards,
>
> Scott
>
> Scott McMorrow
> Teraspeed Consulting Group LLC
> 121 North River Drive
> Narragansett, RI 02882
> (401) 284-1827 Business
> (401) 284-1840 Fax
>
> http://www.teraspeed.com
>
> TeraspeedR is the registered service mark of
> Teraspeed Consulting Group LLC
>
>
>
> Scott McMorrow wrote:
> > Lee
> > The experimental design used in Ultracad corner test is quite
> > sub-optimal, given the incredible launch discontinuity.  I'd be=20
> > surprised if better than a 35 to 50 ps rise time edge actually makes =
it=20
> > into the board.  Then, given the length of the traces involved, I=20
> > suspect that the actual bandwidth seen at the corners is somewhere=20
> > around 3 GHz, at best.  Unfortunately, there do not appear to be any =

> > structures available to determine the actual measurement bandwidth.  =

> > Just because Todd Hubing was responsible for the measurements, does =
not=20
> > mean that the experimental design is as good as an 18ps launch and =
20=20
> > GHz makes it sound.  If you can get a fast launch into a board, and =
can=20
> > use low loss materials, it is possible to see corners.  Gus Panella =
and=20
> > I did so about 8 years ago on a test vehicle that we designed using=20
> > Rogers 4350 material.
> >
> > Having said that, 3GHz bandwidth is typical of the fastest standard
> > logic signals on most conventional PCBs.  Your assertion that =
corners
do=20
> > not matter for digital designs is true.
> >
> > The original source of the corner information comes from the=20
> > Microwave
> > literature.  Gupta, et. al., Microstrip Lines and Slotlines, is a =
good=20
> > reference.  It has been well known that, in Microwave design, right=20
> > angle bends are not a good thing.  If you're trying to decrease =
return=20
> > loss in a microwave design, you will most assuredly use radiused
corners=20
> > or the optimal chamfer.  Why?  Because microwave boards use low loss
> > materials, like PTFE, and very wide trace width on thick substrates =
to=20
> > reduce total power loss.  The corner discontinuity on a 5 mil wide
logic=20
> > signal trace on a conventional high density PCB may not be an issue,
but=20
> > on a low loss microwave board that uses 50 to 200 mil wide=20
> > microstrip
> > traces, that silly little corner is a killer.
> >
> > The magnitude of the corner discontinuity is proportional to it's
> > duration.  A corner discontinuity lasts for approximately 85 x =
sqrt(2 x=20
> > Er(eff)) x w ps:
> >
> > Where
> > Er(eff) =3D is the effective Er of the material
> > w =3D the width of the trace in inches.
> >
> > If we run the numbers,
> >
> >     For a 5 mil stripline trace on FR4 with and Er(eff) of 4, the
> >     discontinuity lasts for 1.2 ps.
> >     For a 100 mil microstrip trace on Duroid with an Er(eff) of 2, =
the
> >     discontinuity lasts for 17ps.
> >
> > If we then use the rule of thumb that a discontinuity is important=20
> > only
> > when it approaches 1/10th of the risetime, then our little 5 mil =
corner=20
> > has an effective operating bandwidth of .35/(1.2 e-12 x 10) =3D 29 =
GHz. =20
> > Clearly out of the region where we are interested for digital logic.
> >
> > But for the 100 mil trace, we have an operating bandwidth of=20
> > .35(17e-12
> > x 10) =3D 2 GHz.  This is quite frankly not a very good microwave =
design.
> >
> >
> > Best regards,
> >
> > Scott
> >
> > Scott McMorrow
> > Teraspeed Consulting Group LLC
> > 121 North River Drive
> > Narragansett, RI 02882
> > (401) 284-1827 Business
> > (401) 284-1840 Fax
> >
> > http://www.teraspeed.com
> >
> > TeraspeedR is the registered service mark of
> > Teraspeed Consulting Group LLC
> >
> >
> >
> > Lee Ritchey wrote:
> >  =20
> >> The paper published by Ultracad tests the effects of right angle=20
> >> bends
in a
> >> logic signal trace with an 18 pSec edge which is equivalent to=20
> >> about 20 GHz.  There is no detectable effect.  These tests were=20
> >> conducted by
Todd
> >> Hubing of UMR in a well equipped lab and are to be trusted.  There=20
> >> have been amy other similar tests done with the same result.
> >>
> >> I believe the notion that right angle bends are a source of=20
> >> problems
stems
> >> from an error in the Motorola ECL handbook published in 1974 and=20
> >> still
in
> >> print with the error.  Now O Semiconductor publishes it.
> >>
> >> This may be one of those cases where simulation shows a change in=20
> >> the
field
> >> distribution around the right angle bend, which we expect.  The
question is
> >> whether the change is significant.  One of our jobs is to=20
> >> distinguish between visible and significant.
> >>
> >> Once again, we have lies, damn lies and simulations.  Simulations
without
> >> validation may well be more dangerous than no simulations at all in
some
> >> cases.
> >>
> >>
> >>  =20
> >>    =20
> >>> [Original Message]
> >>> From: Matthias Bergmann <MBergmann@xxxxxxxxxxxxxxxxxx>
> >>> To: <si-list@xxxxxxxxxxxxx>
> >>> Date: 7/25/2006 1:42:10 AM
> >>> Subject: [SI-LIST] Antwort: Re: 90 degree turn in PCB tracks
> >>>
> >>> Hello,
> >>>
> >>> Following the advices I read the article about 90 degree bends on=20
> >>> ultracad.com as well as the appropriate chapter in Eric Bogatins=20
> >>> book. I am quite surprised about the conclusion that 90 degree=20
> >>> corners don't matter. I remember that once in a simulation of a 50 =

> >>> ohm
microstrip-lin=3D
> >>> e
> >>> with
> >>> a chamfered 90=3DB0 corner in ADS Momentum, I never got a S11 =
better
than=3D
> >>>  15 dB
> >>> at frequencies higher than 15 GHz, even 10 GHz made problems. The=20
> >>> mentioned articles don't consider the frequency respectively just=20
> >>> consider designs where the right-angle bend is electrically=20
> >>> smaller
tha=3D
> >>> n a
> >>> rising edge.
> >>> Would be interesting to know how two 45 degree corners behave at=20
> >>> higer frequencies.
> >>>
> >>> Regards, Matthias
> >>>
> >>> ____________________________________
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