[SI-LIST] Re: 6 Layer microvia stackup

Hi Andrew

An intriguing board!

Before providing a more detailed response, could you pls confirm the
proposed layer thickness.
1m = 40"
50um = .002" (right?)

That means your total board thickness is
  .002"
+.002"
+.004"
+.002"
+.002"
+ copper thickness

which is only .012+a bit". I have never seen a board this thin before, and
imaging it would be hard to assemble, and then hard to keep from breaking.

Is the idea to mount the board on a substrate of some kind (is this why the
BOTTOM layer is called "misc")?

It may be difficult to achieve adequate impedance control with .003" tracks.

In addition, are prepreg layers (layers between the cores) of .002" doable?
with sufficiently uniform Er?

Regards

Jon Keeble.


----- Original Message ----- 
From: "Andrew Seddon" <andrew.seddon@xxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, January 11, 2006 11:24 AM
Subject: [SI-LIST] 6 Layer microvia stackup


>
> Hello,
>
> I'm currently designing a really dense PCB and was wondering if anybody
has
> comments with regards to the signal integrity of the following stack;
>
>
> 1 GND
> 50um ER1 3.6
> 2 SIG 1 75um trace for 50 ohm
> 50um ER1
> 3 SIG 2 100um trace for 50 ohm
> 100um ER2 4.2
> 4 GND
> 50um ER1 3.6
> 5 PWR
> 50um ER1 3.6
> 6 MISC
>
>
> Basically the plan is to do all routing on layers 2 and 3. The top layer
is
> mostly BGA's and floods to a pretty solid GND plane. All lands on layers 1
> and 6 are micro via in pad. So microvias from layers; 1-2, 2-3 . These can
> be stacked to create a 1-3 via.
>
> So I have a few worries about this stack;
>
> 1. Can't route SIG1+SIG2 orthogonally. The impedance calculations are
based
> on each layer being calculated as an independent offset stripline. Is this
> valid and will there be a lot of cross talk on traces running underneath
> each other.
>
> 2. Getting controlled impedance on tracks that switch between 2 and 3
could
> be tricky.
>
>
> Lastly I was wondering if anybody knows a good reference for micro via
> stack's. It seems that you basically have to throw away the stacks used
for
> conventional via's. For example if you have 3 micro via layers on each
side
> (3+n+3) where do your planes go?
>
> Best regards,
>
> Andrew
>
>
>
>
>
>
>
>
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