[SI-LIST] 6 Layer microvia stackup
- From: "Andrew Seddon" <andrew.seddon@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Wed, 11 Jan 2006 00:24:25 -0000
Hello,
I'm currently designing a really dense PCB and was wondering if anybody has
comments with regards to the signal integrity of the following stack;
1 GND
50um ER1 3.6
2 SIG 1 75um trace for 50 ohm
50um ER1
3 SIG 2 100um trace for 50 ohm
100um ER2 4.2
4 GND
50um ER1 3.6
5 PWR
50um ER1 3.6
6 MISC
Basically the plan is to do all routing on layers 2 and 3. The top layer is
mostly BGA's and floods to a pretty solid GND plane. All lands on layers 1
and 6 are micro via in pad. So microvias from layers; 1-2, 2-3 . These can
be stacked to create a 1-3 via.
So I have a few worries about this stack;
1. Can't route SIG1+SIG2 orthogonally. The impedance calculations are based
on each layer being calculated as an independent offset stripline. Is this
valid and will there be a lot of cross talk on traces running underneath
each other.
2. Getting controlled impedance on tracks that switch between 2 and 3 could
be tricky.
Lastly I was wondering if anybody knows a good reference for micro via
stack's. It seems that you basically have to throw away the stacks used for
conventional via's. For example if you have 3 micro via layers on each side
(3+n+3) where do your planes go?
Best regards,
Andrew
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