[SI-LIST] Re: 48V power distribution

Alexandre, within a converter design, that is correct.  But on the board 
that uses a converter as a component, the AC voltage is hidden.

Steve.

At 04:22 PM 10/25/2004 +0100, Gourari, Alexandre wrote:
>But I thought that Steve's original suggestion about safety on 48V was
>right. Given you are not going to use linear regulator to power logic from
>48VDC some sort of buck converter is necessary, so your voltage swing at the
>switcher will be >48VAC peak-to-peak (due to voltage drop on recirculating
>diodes) exceeding 42Vp-p safety threshold.
>
>Best regards,
>Alex Gourari
>
>-----Original Message-----
>From: steve weir [mailto:weirsp@xxxxxxxxxx]
>Sent: Friday, October 22, 2004 7:00 PM
>To: lorber@xxxxxx; tcuratolo@xxxxxxxx; si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: 48V power distribution
>
>
>Walter thanks.  I went back and reviewed the standard.  Stupid me, I have
>had 42.4VDC erroneously stuck in my head for a long time.
>
>As to Tom's question, I didn't see it before-
>
>Tom, an one issue that can come up is of battery return.  One of the nice
>things about isolated power supplies at the card entry is that they
>facilitate a battery return isolated from the signal common.  That frees
>one to tie the signal common to the package frame without a safety issue as
>the frame cannot become the battery return, and therefore doesn't carry
>risk of electrification.  If you push the power converters inward, and you
>want to maintain this important safety characteristic, then you will still
>be stuck keeping the battery return DC isolated from the frame.  It isn't
>the end of the world, but you will want to watch it.  The other thing that
>I think you really want to look at is the physical size of the magnetics
>that will be needed, and I mentioned before.
>
>Regards,
>
>
>Steve
>At 04:34 PM 10/22/2004 -0500, Lorber, Walter wrote:
> >The SELV limit is 60VDC or 42.4VAC in IEC 60950
> >With best regards,
> >Walter
> >
> >
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> >On Behalf Of tompegbel
> >Sent: Friday, October 22, 2004 4:22 PM
> >To: si-list@xxxxxxxxxxxxx
> >Subject: [SI-LIST] Re: 48V power distribution
> >
> >
> >Thanks Steve, I appreciate your insight. I guess I really wanted to
> >focus on the issue of isolation versus non-isolation at the point of
> >entry for the PCB power distribution provided it is within SELV
> >limits. Provided components are available and cost of implemenation
> >is acceptably low, is there any major drawbacks with isolation at the
> >point of load versus isolation at the point of entry?
> >Regards,
> >--Tom
> >
> >--- In si-list@xxxxxxxxxxxxxxx, steve weir <weirsp@xxxx> wrote:
> > > Tom, the biggest issue is that 48V exceeds the 42V low-voltage
> >safety limit
> > > and so requires substantially greater clearances.  A 24V system is
> >under
> > > that limit and does not face the same problem.  48V also changes
> >the
> > > dynamics of available semiconductors.  12V systems and to a certain
> >extent,
> > > 24V systems can leverage the super low on resistance and low
> >capacitance
> > > FETs and diodes.  The last issue is one of magnetics and practical
> > > form-factors.  Given you work for Vicor, you should be pretty
> >familiar with
> > > those and how taller primary to  output ratios aggravate same.
> > >
> > > Regards,
> > >
> > >
> > > Steve
> > > At 02:04 PM 10/19/2004 +0000, tompegbel wrote:
> > >
> > > >Is there a good resource/document for addressing the concerns in
> > > >bussing 48V power in a multilayer board?  The recently popular 12V
> >or
> > > >lower intermediate bus approach has limitations as voltages get
> >lower
> > > >and current gets higher.  There appears to be new approaches of
> >using
> > > >a higher bus voltage (24V or 48V) for distribution since this was
> > > >explored in the 80's with the advent of distributed power and now
> > > >more recently with VoIP type designs.  Any assistance appreciated
> > > >
> > > >
> > > >
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